Searched hist:"27 a5473d92f4ef259af55d8a906c82d3e963b3b9" (Results 1 – 3 of 3) sorted by relevance
| /optee_os/core/arch/arm/include/ |
| H A D | arm32.h | 27a5473d92f4ef259af55d8a906c82d3e963b3b9 Thu Jun 22 08:39:40 UTC 2017 Etienne Carriere <etienne.carriere@linaro.org> core: add TLB invalidation by-mva-all-asid
tlbi_mva_allasid(): TLB invalidation by MVA for all ASID with all
synchronisation support.
tlbi_mva_allasid_nosync(): same invalidation but without the
synchronization barriers.
Remove tlbi_mva_curasid that was disabled and not used.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| H A D | arm64.h | 27a5473d92f4ef259af55d8a906c82d3e963b3b9 Thu Jun 22 08:39:40 UTC 2017 Etienne Carriere <etienne.carriere@linaro.org> core: add TLB invalidation by-mva-all-asid
tlbi_mva_allasid(): TLB invalidation by MVA for all ASID with all
synchronisation support.
tlbi_mva_allasid_nosync(): same invalidation but without the
synchronization barriers.
Remove tlbi_mva_curasid that was disabled and not used.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| /optee_os/core/arch/arm/mm/ |
| H A D | core_mmu.c | 27a5473d92f4ef259af55d8a906c82d3e963b3b9 Thu Jun 22 08:39:40 UTC 2017 Etienne Carriere <etienne.carriere@linaro.org> core: add TLB invalidation by-mva-all-asid
tlbi_mva_allasid(): TLB invalidation by MVA for all ASID with all
synchronisation support.
tlbi_mva_allasid_nosync(): same invalidation but without the
synchronization barriers.
Remove tlbi_mva_curasid that was disabled and not used.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
|