Searched hist:"232 f1cde6d0ea8fde331f49a72f717869d7d4a0c" (Results 1 – 4 of 4) sorted by relevance
| /optee_os/core/arch/riscv/mm/ |
| H A D | core_mmu_arch.c | 232f1cde6d0ea8fde331f49a72f717869d7d4a0c Sat Mar 08 08:55:13 UTC 2025 Yu-Chien Peter Lin <peter.lin@sifive.com> core: mm: refactor ASLR mapping for architecture support
To allow adding RISC-V ASLR support, add arch_aslr_base_addr()
which will be used to apply architecture specific ASLR base
calculation.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
|
| /optee_os/core/include/mm/ |
| H A D | core_mmu.h | 232f1cde6d0ea8fde331f49a72f717869d7d4a0c Sat Mar 08 08:55:13 UTC 2025 Yu-Chien Peter Lin <peter.lin@sifive.com> core: mm: refactor ASLR mapping for architecture support
To allow adding RISC-V ASLR support, add arch_aslr_base_addr()
which will be used to apply architecture specific ASLR base
calculation.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
|
| /optee_os/core/mm/ |
| H A D | core_mmu.c | 232f1cde6d0ea8fde331f49a72f717869d7d4a0c Sat Mar 08 08:55:13 UTC 2025 Yu-Chien Peter Lin <peter.lin@sifive.com> core: mm: refactor ASLR mapping for architecture support
To allow adding RISC-V ASLR support, add arch_aslr_base_addr()
which will be used to apply architecture specific ASLR base
calculation.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
|
| /optee_os/core/arch/arm/mm/ |
| H A D | core_mmu.c | 232f1cde6d0ea8fde331f49a72f717869d7d4a0c Sat Mar 08 08:55:13 UTC 2025 Yu-Chien Peter Lin <peter.lin@sifive.com> core: mm: refactor ASLR mapping for architecture support
To allow adding RISC-V ASLR support, add arch_aslr_base_addr()
which will be used to apply architecture specific ASLR base
calculation.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
|