Searched hist:"214 e8464acd27b41d5e81b94e42b7bf33a54fb40" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/ |
| H A D | plat_psci_handlers.c | 214e8464acd27b41d5e81b94e42b7bf33a54fb40 Fri Mar 03 08:23:08 UTC 2017 Anthony Zhou <anzhou@nvidia.com> Tegra186: PM: fix MISRA defects in plat_psci_handlers.c
Main fixes:
Added explicit casts (e.g. 0U) to integers in order for them to be
compatible with whatever operation they're used in [Rule 10.1]
convert object type to match the type of function parameters
[Rule 10.3]
Force operands of an operator to the same type category [Rule 10.4]
Fix implicit widening of composite assignment [Rule 10.6]
Change-Id: I5840a07f37beefc3326ac56d0b4a4701602bd8a8
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
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| /rk3399_ARM-atf/plat/nvidia/tegra/include/ |
| H A D | tegra_private.h | 214e8464acd27b41d5e81b94e42b7bf33a54fb40 Fri Mar 03 08:23:08 UTC 2017 Anthony Zhou <anzhou@nvidia.com> Tegra186: PM: fix MISRA defects in plat_psci_handlers.c
Main fixes:
Added explicit casts (e.g. 0U) to integers in order for them to be
compatible with whatever operation they're used in [Rule 10.1]
convert object type to match the type of function parameters
[Rule 10.3]
Force operands of an operator to the same type category [Rule 10.4]
Fix implicit widening of composite assignment [Rule 10.6]
Change-Id: I5840a07f37beefc3326ac56d0b4a4701602bd8a8
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
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