Searched hist:"1 e6ebee667da47fd3a87839a239a7574c66f5659" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/x86/lib/fsp/ |
| H A D | fsp_common.c | 1e6ebee667da47fd3a87839a239a7574c66f5659 Wed Aug 16 05:38:31 UTC 2017 Bin Meng <bmeng.cn@gmail.com> x86: fsp: Configure SPI opcode registers before SPI is locked down
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.
This introduces a Kconfig option CONFIG_FSP_LOCKDOWN_SPI for such
FSPs. When it is on, U-Boot will configure the SPI opcode registers
before the lock-down.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
|
| /rk3399_rockchip-uboot/arch/x86/ |
| H A D | Kconfig | 1e6ebee667da47fd3a87839a239a7574c66f5659 Wed Aug 16 05:38:31 UTC 2017 Bin Meng <bmeng.cn@gmail.com> x86: fsp: Configure SPI opcode registers before SPI is locked down
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.
This introduces a Kconfig option CONFIG_FSP_LOCKDOWN_SPI for such
FSPs. When it is on, U-Boot will configure the SPI opcode registers
before the lock-down.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
|