Searched hist:"1 df9ddc0e5ee05dbbeff76aa81f2b1f9c269f1d2" (Results 1 – 7 of 7) sorted by relevance
| /rkbin/RKBOOT/ |
| H A D | RV1126MINIALL_IPC.ini | 1df9ddc0e5ee05dbbeff76aa81f2b1f9c269f1d2 Tue Oct 25 12:30:20 UTC 2022 Wesley Yao <wesley.yao@rock-chips.com> rv1126: ddr: Update ddr bin to v1.09 20221025
Build from:
8fef64cfb9 dram_init: rv1126: Update to v1.09
Update feature:
0d2a0f8f86 drivers: ram: rv1126: Detect bus width of DDR3 through read gate, and init DDR3 again
181bc4650d drivers: ram: rv1126: Fix read_mr()
1911c18330 drivers: ram: rv1126: Fix calc of LPDDR4(X) wrlvl_result min_val
9ebc05219a drivers: ram: rv1126: Fix compiler error if CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8
56f3e68665 rv1126: ddr: Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
1c7093e71f drivers: ram: rv1126: define CONFIG_CMD_DDR_TEST_TOOL by default when CONFIG_DRAM_INIT_BUILD
d393fbb5da drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I93ed60c3967a1f5c2c8e11d35d901d61e29148cc
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| H A D | RV1126MINIALL_FTL.ini | 1df9ddc0e5ee05dbbeff76aa81f2b1f9c269f1d2 Tue Oct 25 12:30:20 UTC 2022 Wesley Yao <wesley.yao@rock-chips.com> rv1126: ddr: Update ddr bin to v1.09 20221025
Build from:
8fef64cfb9 dram_init: rv1126: Update to v1.09
Update feature:
0d2a0f8f86 drivers: ram: rv1126: Detect bus width of DDR3 through read gate, and init DDR3 again
181bc4650d drivers: ram: rv1126: Fix read_mr()
1911c18330 drivers: ram: rv1126: Fix calc of LPDDR4(X) wrlvl_result min_val
9ebc05219a drivers: ram: rv1126: Fix compiler error if CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8
56f3e68665 rv1126: ddr: Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
1c7093e71f drivers: ram: rv1126: define CONFIG_CMD_DDR_TEST_TOOL by default when CONFIG_DRAM_INIT_BUILD
d393fbb5da drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I93ed60c3967a1f5c2c8e11d35d901d61e29148cc
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| H A D | RV1126MINIALL_RAMBOOT.ini | 1df9ddc0e5ee05dbbeff76aa81f2b1f9c269f1d2 Tue Oct 25 12:30:20 UTC 2022 Wesley Yao <wesley.yao@rock-chips.com> rv1126: ddr: Update ddr bin to v1.09 20221025
Build from:
8fef64cfb9 dram_init: rv1126: Update to v1.09
Update feature:
0d2a0f8f86 drivers: ram: rv1126: Detect bus width of DDR3 through read gate, and init DDR3 again
181bc4650d drivers: ram: rv1126: Fix read_mr()
1911c18330 drivers: ram: rv1126: Fix calc of LPDDR4(X) wrlvl_result min_val
9ebc05219a drivers: ram: rv1126: Fix compiler error if CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8
56f3e68665 rv1126: ddr: Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
1c7093e71f drivers: ram: rv1126: define CONFIG_CMD_DDR_TEST_TOOL by default when CONFIG_DRAM_INIT_BUILD
d393fbb5da drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I93ed60c3967a1f5c2c8e11d35d901d61e29148cc
|
| H A D | RV1126MINIALL_SPI_NOR_TINY.ini | 1df9ddc0e5ee05dbbeff76aa81f2b1f9c269f1d2 Tue Oct 25 12:30:20 UTC 2022 Wesley Yao <wesley.yao@rock-chips.com> rv1126: ddr: Update ddr bin to v1.09 20221025
Build from:
8fef64cfb9 dram_init: rv1126: Update to v1.09
Update feature:
0d2a0f8f86 drivers: ram: rv1126: Detect bus width of DDR3 through read gate, and init DDR3 again
181bc4650d drivers: ram: rv1126: Fix read_mr()
1911c18330 drivers: ram: rv1126: Fix calc of LPDDR4(X) wrlvl_result min_val
9ebc05219a drivers: ram: rv1126: Fix compiler error if CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8
56f3e68665 rv1126: ddr: Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
1c7093e71f drivers: ram: rv1126: define CONFIG_CMD_DDR_TEST_TOOL by default when CONFIG_DRAM_INIT_BUILD
d393fbb5da drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I93ed60c3967a1f5c2c8e11d35d901d61e29148cc
|
| H A D | RV1126MINIALL.ini | 1df9ddc0e5ee05dbbeff76aa81f2b1f9c269f1d2 Tue Oct 25 12:30:20 UTC 2022 Wesley Yao <wesley.yao@rock-chips.com> rv1126: ddr: Update ddr bin to v1.09 20221025
Build from:
8fef64cfb9 dram_init: rv1126: Update to v1.09
Update feature:
0d2a0f8f86 drivers: ram: rv1126: Detect bus width of DDR3 through read gate, and init DDR3 again
181bc4650d drivers: ram: rv1126: Fix read_mr()
1911c18330 drivers: ram: rv1126: Fix calc of LPDDR4(X) wrlvl_result min_val
9ebc05219a drivers: ram: rv1126: Fix compiler error if CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8
56f3e68665 rv1126: ddr: Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
1c7093e71f drivers: ram: rv1126: define CONFIG_CMD_DDR_TEST_TOOL by default when CONFIG_DRAM_INIT_BUILD
d393fbb5da drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I93ed60c3967a1f5c2c8e11d35d901d61e29148cc
|
| /rkbin/doc/release/ |
| H A D | RV1126_EN.md | 1df9ddc0e5ee05dbbeff76aa81f2b1f9c269f1d2 Tue Oct 25 12:30:20 UTC 2022 Wesley Yao <wesley.yao@rock-chips.com> rv1126: ddr: Update ddr bin to v1.09 20221025
Build from:
8fef64cfb9 dram_init: rv1126: Update to v1.09
Update feature:
0d2a0f8f86 drivers: ram: rv1126: Detect bus width of DDR3 through read gate, and init DDR3 again
181bc4650d drivers: ram: rv1126: Fix read_mr()
1911c18330 drivers: ram: rv1126: Fix calc of LPDDR4(X) wrlvl_result min_val
9ebc05219a drivers: ram: rv1126: Fix compiler error if CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8
56f3e68665 rv1126: ddr: Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
1c7093e71f drivers: ram: rv1126: define CONFIG_CMD_DDR_TEST_TOOL by default when CONFIG_DRAM_INIT_BUILD
d393fbb5da drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I93ed60c3967a1f5c2c8e11d35d901d61e29148cc
|
| H A D | RV1126_CN.md | 1df9ddc0e5ee05dbbeff76aa81f2b1f9c269f1d2 Tue Oct 25 12:30:20 UTC 2022 Wesley Yao <wesley.yao@rock-chips.com> rv1126: ddr: Update ddr bin to v1.09 20221025
Build from:
8fef64cfb9 dram_init: rv1126: Update to v1.09
Update feature:
0d2a0f8f86 drivers: ram: rv1126: Detect bus width of DDR3 through read gate, and init DDR3 again
181bc4650d drivers: ram: rv1126: Fix read_mr()
1911c18330 drivers: ram: rv1126: Fix calc of LPDDR4(X) wrlvl_result min_val
9ebc05219a drivers: ram: rv1126: Fix compiler error if CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8
56f3e68665 rv1126: ddr: Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
1c7093e71f drivers: ram: rv1126: define CONFIG_CMD_DDR_TEST_TOOL by default when CONFIG_DRAM_INIT_BUILD
d393fbb5da drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I93ed60c3967a1f5c2c8e11d35d901d61e29148cc
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