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/rk3399_rockchip-uboot/arch/arm/include/asm/arch-omap3/
H A Dmem.h1be1433b834aaf7aef7c92275f92d4729f6bd62e Fri Nov 18 12:48:04 UTC 2011 Tom Rini <trini@ti.com> OMAP3: Add optimal SDRC autorefresh control values

This adds the optimal SDRC autorefresh control register values for
100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this
to provide the default 165MHz value.

Signed-off-by: Tom Rini <trini@ti.com>