Searched hist:"1 b104208af076cc679ccd8f6e1e3d877bb015256" (Results 1 – 3 of 3) sorted by relevance
| /optee_os/core/include/drivers/ |
| H A D | stm32_risaf.h | 1b104208af076cc679ccd8f6e1e3d877bb015256 Wed Aug 28 14:10:33 UTC 2024 Gatien Chevallier <gatien.chevallier@foss.st.com> drivers: firewall: add stm32_risaf driver
Add the stm32_risaf driver to handle all RISAFs instances on a SoC.
Through RISAF registers, a trusted domain application, or the application
to whom the configuration has been delegated, assigns memory regions to
one or more security domains (secure, privilege, compartment).
RISAF4 includes the DDR memory cipher engine (DDRMCE) feature.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| /optee_os/core/drivers/firewall/ |
| H A D | stm32_risaf.c | 1b104208af076cc679ccd8f6e1e3d877bb015256 Wed Aug 28 14:10:33 UTC 2024 Gatien Chevallier <gatien.chevallier@foss.st.com> drivers: firewall: add stm32_risaf driver
Add the stm32_risaf driver to handle all RISAFs instances on a SoC.
Through RISAF registers, a trusted domain application, or the application
to whom the configuration has been delegated, assigns memory regions to
one or more security domains (secure, privilege, compartment).
RISAF4 includes the DDR memory cipher engine (DDRMCE) feature.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | sub.mk | 1b104208af076cc679ccd8f6e1e3d877bb015256 Wed Aug 28 14:10:33 UTC 2024 Gatien Chevallier <gatien.chevallier@foss.st.com> drivers: firewall: add stm32_risaf driver
Add the stm32_risaf driver to handle all RISAFs instances on a SoC.
Through RISAF registers, a trusted domain application, or the application
to whom the configuration has been delegated, assigns memory regions to
one or more security domains (secure, privilege, compartment).
RISAF4 includes the DDR memory cipher engine (DDRMCE) feature.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
|