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/rk3399_rockchip-uboot/drivers/irq/
H A Dirq-gpio-v2.c0fdee37b0a1bc43510f82d0deb22d27904619ddb Wed Mar 25 13:11:29 UTC 2020 Joseph Chen <chenjh@rock-chips.com> drivers: irq: add irq to gpio v2 transfer support

Some platform with new GPIO IP implements the low/high
registers with write mask. This configure handles it.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I855357d29e7fba072b867c06a31a049462ebf6ff
H A DKconfig0fdee37b0a1bc43510f82d0deb22d27904619ddb Wed Mar 25 13:11:29 UTC 2020 Joseph Chen <chenjh@rock-chips.com> drivers: irq: add irq to gpio v2 transfer support

Some platform with new GPIO IP implements the low/high
registers with write mask. This configure handles it.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I855357d29e7fba072b867c06a31a049462ebf6ff
H A DMakefile0fdee37b0a1bc43510f82d0deb22d27904619ddb Wed Mar 25 13:11:29 UTC 2020 Joseph Chen <chenjh@rock-chips.com> drivers: irq: add irq to gpio v2 transfer support

Some platform with new GPIO IP implements the low/high
registers with write mask. This configure handles it.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I855357d29e7fba072b867c06a31a049462ebf6ff