Searched hist:"0 e84f8ac75798113fc7170d3f1e4d4f8b25c34bf" (Results 1 – 5 of 5) sorted by relevance
| /optee_os/core/arch/arm/include/kernel/ |
| H A D | thread_private_arch.h | 0e84f8ac75798113fc7170d3f1e4d4f8b25c34bf Tue Jul 11 18:38:29 UTC 2023 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: preserve PSTATE.PAN when making SPSR
When setup_unwind_user_mode() prepares to resume execution after
syscall_sys_return() or when a thread is suspended a new SPSR is
fabricated base on the current PSTATE.
Until now when remaining in S-EL1 to fabricate an SPSR only the
PSTATE.DAIF bits had to be taken into account. However, with PSTATE.PAN
there's yet another bit to consider. Since PSTATE has a few more bits
and more may be added as AArch64 evolves this problem is only going to
get worse. So implement this in a single internal C function to replace
current open codes C and assembly versions.
The AArch64 assembly versions of thread_rpc() are renamed to
thread_rpc_spsr() to indicate that SPSR is passed in the second argument
instead of having it open coded internally in the assembly function.
New C wrapper functions are added to preserve the old thread_rpc()
interface as needed.
handle_user_mode_panic() is still basing its created SPSR on the saved
SPSR from S-EL0, but now PAN bit is copied too.
Fixes: 6fa59c9a70dc ("arm64: Introduce permissive PAN implementation")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
|
| /optee_os/core/arch/arm/kernel/ |
| H A D | thread_spmc_a64.S | 0e84f8ac75798113fc7170d3f1e4d4f8b25c34bf Tue Jul 11 18:38:29 UTC 2023 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: preserve PSTATE.PAN when making SPSR
When setup_unwind_user_mode() prepares to resume execution after
syscall_sys_return() or when a thread is suspended a new SPSR is
fabricated base on the current PSTATE.
Until now when remaining in S-EL1 to fabricate an SPSR only the
PSTATE.DAIF bits had to be taken into account. However, with PSTATE.PAN
there's yet another bit to consider. Since PSTATE has a few more bits
and more may be added as AArch64 evolves this problem is only going to
get worse. So implement this in a single internal C function to replace
current open codes C and assembly versions.
The AArch64 assembly versions of thread_rpc() are renamed to
thread_rpc_spsr() to indicate that SPSR is passed in the second argument
instead of having it open coded internally in the assembly function.
New C wrapper functions are added to preserve the old thread_rpc()
interface as needed.
handle_user_mode_panic() is still basing its created SPSR on the saved
SPSR from S-EL0, but now PAN bit is copied too.
Fixes: 6fa59c9a70dc ("arm64: Introduce permissive PAN implementation")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
|
| H A D | thread_optee_smc_a64.S | 0e84f8ac75798113fc7170d3f1e4d4f8b25c34bf Tue Jul 11 18:38:29 UTC 2023 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: preserve PSTATE.PAN when making SPSR
When setup_unwind_user_mode() prepares to resume execution after
syscall_sys_return() or when a thread is suspended a new SPSR is
fabricated base on the current PSTATE.
Until now when remaining in S-EL1 to fabricate an SPSR only the
PSTATE.DAIF bits had to be taken into account. However, with PSTATE.PAN
there's yet another bit to consider. Since PSTATE has a few more bits
and more may be added as AArch64 evolves this problem is only going to
get worse. So implement this in a single internal C function to replace
current open codes C and assembly versions.
The AArch64 assembly versions of thread_rpc() are renamed to
thread_rpc_spsr() to indicate that SPSR is passed in the second argument
instead of having it open coded internally in the assembly function.
New C wrapper functions are added to preserve the old thread_rpc()
interface as needed.
handle_user_mode_panic() is still basing its created SPSR on the saved
SPSR from S-EL0, but now PAN bit is copied too.
Fixes: 6fa59c9a70dc ("arm64: Introduce permissive PAN implementation")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
|
| H A D | abort.c | 0e84f8ac75798113fc7170d3f1e4d4f8b25c34bf Tue Jul 11 18:38:29 UTC 2023 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: preserve PSTATE.PAN when making SPSR
When setup_unwind_user_mode() prepares to resume execution after
syscall_sys_return() or when a thread is suspended a new SPSR is
fabricated base on the current PSTATE.
Until now when remaining in S-EL1 to fabricate an SPSR only the
PSTATE.DAIF bits had to be taken into account. However, with PSTATE.PAN
there's yet another bit to consider. Since PSTATE has a few more bits
and more may be added as AArch64 evolves this problem is only going to
get worse. So implement this in a single internal C function to replace
current open codes C and assembly versions.
The AArch64 assembly versions of thread_rpc() are renamed to
thread_rpc_spsr() to indicate that SPSR is passed in the second argument
instead of having it open coded internally in the assembly function.
New C wrapper functions are added to preserve the old thread_rpc()
interface as needed.
handle_user_mode_panic() is still basing its created SPSR on the saved
SPSR from S-EL0, but now PAN bit is copied too.
Fixes: 6fa59c9a70dc ("arm64: Introduce permissive PAN implementation")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
|
| H A D | thread.c | 0e84f8ac75798113fc7170d3f1e4d4f8b25c34bf Tue Jul 11 18:38:29 UTC 2023 Jens Wiklander <jens.wiklander@linaro.org> core: arm64: preserve PSTATE.PAN when making SPSR
When setup_unwind_user_mode() prepares to resume execution after
syscall_sys_return() or when a thread is suspended a new SPSR is
fabricated base on the current PSTATE.
Until now when remaining in S-EL1 to fabricate an SPSR only the
PSTATE.DAIF bits had to be taken into account. However, with PSTATE.PAN
there's yet another bit to consider. Since PSTATE has a few more bits
and more may be added as AArch64 evolves this problem is only going to
get worse. So implement this in a single internal C function to replace
current open codes C and assembly versions.
The AArch64 assembly versions of thread_rpc() are renamed to
thread_rpc_spsr() to indicate that SPSR is passed in the second argument
instead of having it open coded internally in the assembly function.
New C wrapper functions are added to preserve the old thread_rpc()
interface as needed.
handle_user_mode_panic() is still basing its created SPSR on the saved
SPSR from S-EL0, but now PAN bit is copied too.
Fixes: 6fa59c9a70dc ("arm64: Introduce permissive PAN implementation")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
|