Searched hist:"0 b3e87afc2abd8dd6eb0052cd1be00de94a96637" (Results 1 – 3 of 3) sorted by relevance
| /rkbin/RKBOOT/ |
| H A D | RK3528MINIALL.ini | 0b3e87afc2abd8dd6eb0052cd1be00de94a96637 Tue Jan 30 01:27:42 UTC 2024 Zhihuan <huan.he@rock-chips.com> rk3528: ddr: update ddrbin to v1.09
build from:
665f3e4817 dram_init: rk3528: Update to v1.09
update feature:
0ac0349595 rk3528: ddr: enable vref training and rx odt greater than 600MHz
14db66a434 rk3528: fix CL err for byte mode lp4 in training
8f381239f7 rk356x: rk3528: rk3562: atags: add fwver support
804131c4aa dram_init: rk3528: modify ddr4 528MHz to 666MHz
1be001835a dram_init: rk3528: fix lp4/lp4x 4L pcb config wrong
88756718fc dram_init: rk3528: add LPDDR4_RD_WR_DBI_EN for lp4 dbi control
b3a7326c46 dram_init: rk3528: fix MR22 soc odt get unmatched value
06eb4676fa rk356x: rk3562: rk3528: add lp3 odt detect
f10242d223 dram_init: rk3528: add bin size for bss
Change-Id: I51029ed43aeb9ea0eb9edcddeea6373f4aca0a0c
Signed-off-by: Zhihuan <huan.he@rock-chips.com>
|
| /rkbin/doc/release/ |
| H A D | RK3528_CN.md | 0b3e87afc2abd8dd6eb0052cd1be00de94a96637 Tue Jan 30 01:27:42 UTC 2024 Zhihuan <huan.he@rock-chips.com> rk3528: ddr: update ddrbin to v1.09
build from:
665f3e4817 dram_init: rk3528: Update to v1.09
update feature:
0ac0349595 rk3528: ddr: enable vref training and rx odt greater than 600MHz
14db66a434 rk3528: fix CL err for byte mode lp4 in training
8f381239f7 rk356x: rk3528: rk3562: atags: add fwver support
804131c4aa dram_init: rk3528: modify ddr4 528MHz to 666MHz
1be001835a dram_init: rk3528: fix lp4/lp4x 4L pcb config wrong
88756718fc dram_init: rk3528: add LPDDR4_RD_WR_DBI_EN for lp4 dbi control
b3a7326c46 dram_init: rk3528: fix MR22 soc odt get unmatched value
06eb4676fa rk356x: rk3562: rk3528: add lp3 odt detect
f10242d223 dram_init: rk3528: add bin size for bss
Change-Id: I51029ed43aeb9ea0eb9edcddeea6373f4aca0a0c
Signed-off-by: Zhihuan <huan.he@rock-chips.com>
|
| H A D | RK3528_EN.md | 0b3e87afc2abd8dd6eb0052cd1be00de94a96637 Tue Jan 30 01:27:42 UTC 2024 Zhihuan <huan.he@rock-chips.com> rk3528: ddr: update ddrbin to v1.09
build from:
665f3e4817 dram_init: rk3528: Update to v1.09
update feature:
0ac0349595 rk3528: ddr: enable vref training and rx odt greater than 600MHz
14db66a434 rk3528: fix CL err for byte mode lp4 in training
8f381239f7 rk356x: rk3528: rk3562: atags: add fwver support
804131c4aa dram_init: rk3528: modify ddr4 528MHz to 666MHz
1be001835a dram_init: rk3528: fix lp4/lp4x 4L pcb config wrong
88756718fc dram_init: rk3528: add LPDDR4_RD_WR_DBI_EN for lp4 dbi control
b3a7326c46 dram_init: rk3528: fix MR22 soc odt get unmatched value
06eb4676fa rk356x: rk3562: rk3528: add lp3 odt detect
f10242d223 dram_init: rk3528: add bin size for bss
Change-Id: I51029ed43aeb9ea0eb9edcddeea6373f4aca0a0c
Signed-off-by: Zhihuan <huan.he@rock-chips.com>
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