Searched +full:x1000 +full:- +full:ost (Results 1 – 10 of 10) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>17 "#clock-cells":22 - ingenic,x1000-ost23 - ingenic,x2000-ost31 clock-names:32 const: ost38 - "#clock-cells"[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#11 Documentation/mips/ingenic-tcu.rst.14 - Paul Cercueil <paul@crapouillou.net>21 - ingenic,jz4740-tcu22 - ingenic,jz4725b-tcu23 - ingenic,jz4770-tcu24 - ingenic,jz4780-tcu25 - ingenic,x1000-tcu[all …]
1 // SPDX-License-Identifier: GPL-2.09 #include <linux/clk-provider.h>20 #include <dt-bindings/clock/ingenic,sysost.h>22 /* OST register offsets */70 struct ingenic_ost *ost; member96 const struct ingenic_ost_clk_info *info = ost_clk->info; in ingenic_ost_percpu_timer_recalc_rate()99 prescale = readl(ost_clk->ost->base + info->ostccr_reg); in ingenic_ost_percpu_timer_recalc_rate()110 const struct ingenic_ost_clk_info *info = ost_clk->info; in ingenic_ost_global_timer_recalc_rate()113 prescale = readl(ost_clk->ost->base + info->ostccr_reg); in ingenic_ost_global_timer_recalc_rate()149 const struct ingenic_ost_clk_info *info = ost_clk->info; in ingenic_ost_percpu_timer_set_rate()[all …]
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/jz4780-cgu.h>3 #include <dt-bindings/clock/ingenic,tcu.h>4 #include <dt-bindings/dma/jz4780-dma.h>7 #address-cells = <1>;8 #size-cells = <1>;12 #address-cells = <1>;13 #size-cells = <0>;17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";21 clock-names = "cpu";[all …]
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/jz4725b-cgu.h>3 #include <dt-bindings/clock/ingenic,tcu.h>6 #address-cells = <1>;7 #size-cells = <1>;11 #address-cells = <1>;12 #size-cells = <0>;16 compatible = "ingenic,xburst-mxu1.0";20 clock-names = "cpu";24 cpuintc: interrupt-controller {[all …]
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/jz4770-cgu.h>3 #include <dt-bindings/clock/ingenic,tcu.h>6 #address-cells = <1>;7 #size-cells = <1>;11 #address-cells = <1>;12 #size-cells = <0>;16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";20 clock-names = "cpu";24 cpuintc: interrupt-controller {[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <linux/clk-provider.h>10 #include <linux/mfd/ingenic-tcu.h>16 #include <dt-bindings/clock/ingenic,tcu.h>18 /* 8 channels max + watchdog + OST */22 #define pr_fmt(fmt) "ingenic-tcu-clk: " fmt67 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_enable()68 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_enable()70 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable()78 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_disable()[all …]
1 // SPDX-License-Identifier: GPL-2.03 * X1000 SoC CGU driver7 #include <linux/clk-provider.h>12 #include <dt-bindings/clock/x1000-cgu.h>69 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_recalc_rate()118 return -EINVAL; in x1000_otg_phy_set_rate()121 spin_lock_irqsave(&cgu->lock, flags); in x1000_otg_phy_set_rate()123 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_set_rate()126 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_set_rate()128 spin_unlock_irqrestore(&cgu->lock, flags); in x1000_otg_phy_set_rate()[all …]
2 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC3 * Copyright(c) 2002-2010 Exar Corp.47 * Default is '2' - which means disable in promisc mode48 * and enable in non-promiscuous mode.60 #include <linux/dma-mapping.h>78 #include <linux/io-64-nonatomic-lo-hi.h>89 #include "s2io-regs.h"104 ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) && in RXD_IS_UP2DT()105 (GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK)); in RXD_IS_UP2DT()125 return test_bit(__S2IO_STATE_CARD_UP, &sp->state); in is_s2io_card_up()[all …]
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