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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Drenesas,usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 2.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - items:
16 - const: renesas,usb2-phy-r8a77470 # RZ/G1C
18 - items:
19 - enum:
[all …]
H A Dnvidia,tegra124-xusb-padctl.txt11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
20 Pads will be represented as children of the top-level XUSB pad controller
23 PHY bindings, as described by the phy-bindings.txt file in this directory.
29 abstraction of the signals that are routed to a USB receptacle (i.e. a PHY
34 --------------------
[all …]
H A Dphy-hisi-inno-usb2.txt1 Device tree bindings for HiSilicon INNO USB2 PHY
4 - compatible: Should be one of the following strings:
5 "hisilicon,inno-usb2-phy",
6 "hisilicon,hi3798cv200-usb2-phy".
7 - reg: Should be the address space for PHY configuration register in peripheral
9 - clocks: The phandle and clock specifier pair for INNO USB2 PHY device
11 - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset
13 - #address-cells: Must be 1.
14 - #size-cells: Must be 0.
16 The INNO USB2 PHY device should be a child node of peripheral controller that
[all …]
H A Dsocionext,uniphier-usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB2 PHY
10 This describes the devicetree bindings for PHY interface built into
11 USB2 controller implemented on Socionext UniPhier SoCs.
12 Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3
13 controller doesn't include its own High-Speed PHY. This needs to specify
14 USB2 PHY instead of USB3 HS-PHY.
[all …]
H A Dti,omap-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: OMAP USB2 PHY
10 - Kishon Vijay Abraham I <kishon@ti.com>
11 - Roger Quadros <rogerq@ti.com>
16 - items:
17 - enum:
18 - ti,dra7x-usb2
[all …]
H A Damlogic,meson8b-usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/phy/amlogic,meson8b-usb2-phy.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Amlogic Meson8, Meson8b, Meson8m2 and GXBB USB2 PHY
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
15 - items:
16 - enum:
17 - amlogic,meson8-usb2-phy
18 - amlogic,meson8b-usb2-phy
[all …]
H A Dphy-lantiq-rcu-usb2.txt1 Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
4 This binding describes the USB PHY hardware provided by the RCU module on the
9 -------------------------------------------------------------------------------
11 - compatible : Should be one of
12 "lantiq,ase-usb2-phy"
13 "lantiq,danube-usb2-phy"
14 "lantiq,xrx100-usb2-phy"
15 "lantiq,xrx200-usb2-phy"
16 "lantiq,xrx300-usb2-phy"
17 - reg : Defines the following sets of registers in the parent
[all …]
H A Dphy-mvebu-utmi.txt1 MVEBU A3700 UTMI PHY
2 --------------------
4 USB2 UTMI+ PHY controllers can be found on the following Marvell MVEBU SoCs:
7 On Armada 3700, there are two USB controllers, one is compatible with the USB2
8 and USB3 specifications and supports OTG. The other one is USB2 compliant and
10 different UTMI PHY.
14 - compatible: Should be one of:
15 * "marvell,a3700-utmi-host-phy" for the PHY connected to
16 the USB2 host-only controller.
17 * "marvell,a3700-utmi-otg-phy" for the PHY connected to
[all …]
H A Damlogic,meson-g12a-usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/amlogic,meson-g12a-usb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic G12A USB2 PHY
11 - Neil Armstrong <narmstrong@baylibre.com>
16 - amlogic,meson-g12a-usb2-phy
17 - amlogic,meson-a1-usb2-phy
25 clock-names:
27 - const: xtal
[all …]
H A Dti-phy.txt1 TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs
3 OMAP CONTROL PHY
6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
11 e.g. USB3 PHY and SATA PHY on OMAP5.
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
14 e.g. PCIE PHY in DRA7x
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
[all …]
/OK3568_Linux_fs/u-boot/drivers/phy/
H A Dphy-rockchip-inno-usb2.su
/OK3568_Linux_fs/kernel/drivers/phy/broadcom/
H A Dphy-bcm-ns-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Broadcom Northstar USB 2.0 PHY Driver
15 #include <linux/phy/phy.h>
22 struct phy *phy; member
26 static int bcm_ns_usb2_phy_init(struct phy *phy) in bcm_ns_usb2_phy_init() argument
28 struct bcm_ns_usb2 *usb2 = phy_get_drvdata(phy); in bcm_ns_usb2_phy_init() local
29 struct device *dev = usb2->dev; in bcm_ns_usb2_phy_init()
30 void __iomem *dmu = usb2->dmu; in bcm_ns_usb2_phy_init()
34 err = clk_prepare_enable(usb2->ref_clk); in bcm_ns_usb2_phy_init()
40 ref_clk_rate = clk_get_rate(usb2->ref_clk); in bcm_ns_usb2_phy_init()
[all …]
H A Dphy-bcm-kona-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * phy-bcm-kona-usb2.c - Broadcom Kona USB2 Phy Driver
15 #include <linux/phy/phy.h>
34 static void bcm_kona_usb_phy_power(struct bcm_kona_usb *phy, int on) in bcm_kona_usb_phy_power() argument
38 val = readl(phy->regs + OTGCTL); in bcm_kona_usb_phy_power()
40 /* Configure and power PHY */ in bcm_kona_usb_phy_power()
47 writel(val, phy->regs + OTGCTL); in bcm_kona_usb_phy_power()
50 static int bcm_kona_usb_phy_init(struct phy *gphy) in bcm_kona_usb_phy_init()
52 struct bcm_kona_usb *phy = phy_get_drvdata(gphy); in bcm_kona_usb_phy_init() local
55 /* Soft reset PHY */ in bcm_kona_usb_phy_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/samsung/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
3 obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o
4 obj-$(CONFIG_PHY_EXYNOS_PCIE) += phy-exynos-pcie.o
5 obj-$(CONFIG_PHY_SAMSUNG_UFS) += phy-samsung-ufs.o
6 obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-exynos-usb2.o
7 phy-exynos-usb2-y += phy-samsung-usb2.o
8 phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o
9 phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4X12_USB2) += phy-exynos4x12-usb2.o
10 phy-exynos-usb2-$(CONFIG_PHY_EXYNOS5250_USB2) += phy-exynos5250-usb2.o
[all …]
H A Dphy-samsung-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver
15 #include <linux/phy/phy.h>
18 #include "phy-samsung-usb2.h"
20 static int samsung_usb2_phy_power_on(struct phy *phy) in samsung_usb2_phy_power_on() argument
22 struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy); in samsung_usb2_phy_power_on()
23 struct samsung_usb2_phy_driver *drv = inst->drv; in samsung_usb2_phy_power_on()
26 dev_dbg(drv->dev, "Request to power_on \"%s\" usb phy\n", in samsung_usb2_phy_power_on()
27 inst->cfg->label); in samsung_usb2_phy_power_on()
29 if (drv->vbus) { in samsung_usb2_phy_power_on()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/usb/
H A Damlogic,meson-g12a-usb-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
22 The DWC3 Glue controls the PHY routing and power, an interrupt line is
[all …]
H A Dnvidia,tegra124-xusb.txt4 The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
8 --------------------
9 - compatible: Must be:
10 - Tegra124: "nvidia,tegra124-xusb"
11 - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
12 - Tegra210: "nvidia,tegra210-xusb"
13 - Tegra186: "nvidia,tegra186-xusb"
14 - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
16 - reg-names: Must contain the following entries:
17 - "hcd"
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/tegra/
H A Dxusb-tegra186.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
10 #include <linux/phy/phy.h>
21 #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0)
149 /* USB 2.0 UTMI PHY support */
154 struct tegra_xusb_usb2_lane *usb2; in tegra186_usb2_lane_probe() local
157 usb2 = kzalloc(sizeof(*usb2), GFP_KERNEL); in tegra186_usb2_lane_probe()
158 if (!usb2) in tegra186_usb2_lane_probe()
159 return ERR_PTR(-ENOMEM); in tegra186_usb2_lane_probe()
161 INIT_LIST_HEAD(&usb2->base.list); in tegra186_usb2_lane_probe()
[all …]
H A Dxusb-tegra124.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/phy/phy.h>
229 mutex_lock(&padctl->lock); in tegra124_xusb_padctl_enable()
231 if (padctl->enable++ > 0) in tegra124_xusb_padctl_enable()
251 mutex_unlock(&padctl->lock); in tegra124_xusb_padctl_enable()
259 mutex_lock(&padctl->lock); in tegra124_xusb_padctl_disable()
261 if (WARN_ON(padctl->enable == 0)) in tegra124_xusb_padctl_disable()
264 if (--padctl->enable > 0) in tegra124_xusb_padctl_disable()
284 mutex_unlock(&padctl->lock); in tegra124_xusb_padctl_disable()
297 return -ENODEV; in tegra124_usb3_save_context()
[all …]
H A Dxusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
12 #include <linux/phy/phy.h>
13 #include <linux/phy/tegra/xusb.h>
24 static struct phy *tegra_xusb_pad_of_xlate(struct device *dev, in tegra_xusb_pad_of_xlate()
28 struct phy *phy = NULL; in tegra_xusb_pad_of_xlate() local
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
[all …]
H A Dxusb-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/phy/phy.h>
25 ((x) ? (11 + ((x) - 1) * 6) : 0)
259 /* must be called under padctl->lock */
262 struct tegra_xusb_pcie_pad *pcie = to_pcie_pad(padctl->pcie); in tegra210_pex_uphy_enable()
267 if (pcie->enable > 0) { in tegra210_pex_uphy_enable()
268 pcie->enable++; in tegra210_pex_uphy_enable()
272 err = clk_prepare_enable(pcie->pll); in tegra210_pex_uphy_enable()
276 err = reset_control_deassert(pcie->rst); in tegra210_pex_uphy_enable()
355 err = -ETIMEDOUT; in tegra210_pex_uphy_enable()
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/amlogic/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Amlogic platforms
6 tristate "Meson8, Meson8b, Meson8m2 and GXBB USB2 PHY driver"
14 Enable this to support the Meson USB2 PHYs found in Meson8,
19 tristate "Meson GXL and GXM USB2 PHY drivers"
26 Enable this to support the Meson USB2 PHYs found in Meson
31 tristate "Meson G12A USB2 PHY driver"
37 Enable this to support the Meson USB2 PHYs found in Meson
42 tristate "Meson G12A USB3+PCIE Combo PHY driver"
48 Enable this to support the Meson USB3 + PCIE Combo PHY found
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/lantiq/
H A Dphy-lantiq-rcu-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Lantiq XWAY SoC RCU module based USB 1.1/2.0 PHY driver
6 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
16 #include <linux/phy/phy.h>
22 /* Transmitter HS Pre-Emphasis Enable */
41 struct phy *phy; member
70 .compatible = "lantiq,ase-usb2-phy",
74 .compatible = "lantiq,danube-usb2-phy",
78 .compatible = "lantiq,xrx100-usb2-phy",
82 .compatible = "lantiq,xrx200-usb2-phy",
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/marvell/
H A Dphy-mvebu-a3700-utmi.c1 // SPDX-License-Identifier: GPL-2.0
9 * Marvell A3700 UTMI PHY driver
17 #include <linux/phy/phy.h>
21 /* Armada 3700 UTMI PHY registers */
59 * struct mvebu_a3700_utmi_caps - PHY capabilities
61 * @usb32: Flag indicating which PHY is in use (impacts the register map):
62 * - The UTMI PHY wired to the USB3/USB2 controller (otg)
63 * - The UTMI PHY wired to the USB2 controller (host only)
64 * @ops: PHY operations
72 * struct mvebu_a3700_utmi - PHY driver data
[all …]
/OK3568_Linux_fs/tools/windows/Rockchip_USB_SQ_Tool/
H A D版本更新记录.txt2 1. 支持 USB2.0 芯片 RK3228/RK3288/RK3308/RK3308B-S/RK3326/RK3326S/RK3328/RK3399/RK356X/RK3588/RK3588S/P…
3 2. 支持 USB2.0 Device/Host 眼图测试命令的查询；
4 3. 支持 USB2.0 Device/Host High-speed 发送信号的 Pre-emphasize、Height、ODT、Slew Rate 等调整；
5 4. 支持 USB2.0 Device/Host High-speed 接收信号的 Squelch 调整；
6 5. 支持 USB2.0 Host 断开阈值 Disconnect Detection 调整；
7 6. 支持 USB2.0 Device Vbus 检测阈值 B_SessionValid 调整；
8 7. 支持 USB2.0 PHY Tuning 命令自动生成对应代码；
9 8. 支持 USB3.1 PHY Tx Compliance Test 命令查询和 Tx 信号 Tuning（仅支持 RK3588）；
19 2. 修复 RK3588 USB2.0 PHY Host Disconnect Detection 的 io 命令地址错误问题
20 3. 修复 RV1103/RV1106 USB2.0 PHY Tuning 项的 io 命令地址错误问题

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