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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/bcm/
H A Dbrcm,brcmstb.txt2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
22 "syscon"
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dti-phy.txt1 TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs
3 OMAP CONTROL PHY
6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
11 e.g. USB3 PHY and SATA PHY on OMAP5.
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
14 e.g. PCIE PHY in DRA7x
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
[all …]
H A Dhix5hd2-phy.txt1 Hisilicon hix5hd2 SATA PHY
2 -----------------------
5 - compatible: should be "hisilicon,hix5hd2-sata-phy"
6 - reg: offset and length of the PHY registers
7 - #phy-cells: must be 0
8 Refer to phy/phy-bindings.txt for the generic PHY binding properties
11 - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.
12 - hisilicon,power-reg: offset and bit number within peripheral-syscon,
13 register of controlling sata power supply.
16 sata_phy: phy@f9900000 {
[all …]
H A Dsamsung-phy.txt2 -------------------------------------------------
5 - compatible : should be one of the listed compatibles:
6 - "samsung,s5pv210-mipi-video-phy"
7 - "samsung,exynos5420-mipi-video-phy"
8 - "samsung,exynos5433-mipi-video-phy"
9 - #phy-cells : from the generic phy bindings, must be 1;
12 - syscon - phandle to the PMU system controller
14 In case of exynos5433 compatible PHY:
15 - samsung,pmu-syscon - phandle to the PMU system controller
16 - samsung,disp-sysreg - phandle to the DISP system registers controller
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H A Dti,omap-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: OMAP USB2 PHY
10 - Kishon Vijay Abraham I <kishon@ti.com>
11 - Roger Quadros <rogerq@ti.com>
16 - items:
17 - enum:
18 - ti,dra7x-usb2
[all …]
H A Drockchip-usb-phy.txt1 ROCKCHIP USB2 PHY
4 - compatible: matching the soc type, one of
5 "rockchip,rk3066a-usb-phy"
6 "rockchip,rk3188-usb-phy"
7 "rockchip,rk3288-usb-phy"
8 - #address-cells: should be 1
9 - #size-cells: should be 0
12 - rockchip,grf : phandle to the syscon managing the "general
13 register files" - phy should be a child of the GRF instead
15 Sub-nodes:
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
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H A Dmt7629.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/mt7629-clk.h>
11 #include <dt-bindings/power/mt7622-power.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/reset/mt7629-resets.h>
18 interrupt-parent = <&sysirq>;
19 #address-cells = <1>;
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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/rk3568-power.h>
18 interrupt-parent = <&gic>;
[all …]
H A Drk3588.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy-snps-pcie3.h>
8 #include "rk3588-vccio3-pinctrl.dtsi"
20 compatible = "rockchip,rk3588-dwc3", "rockchip,rk3399-dwc3";
23 clock-names = "ref", "suspend", "bus";
24 #address-cells = <2>;
25 #size-cells = <2>;
33 power-domains = <&power RK3588_PD_USB>;
35 reset-names = "usb3-otg";
38 phy-names = "usb2-phy";
[all …]
H A Drk3399.dtsi2 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd.
4 * SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/clock/rk3399-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/power/rk3399-power.h>
13 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&gic>;
[all …]
H A Drk3562.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3562-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/rk3562-power.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/soc/rockchip-system-status.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Drk3588s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/rk3588-power.h>
11 #include <dt-bindings/gpio/gpio.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3399pro-npu.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/clock/rk1808-cru.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/power/rk1808-power.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "rockchip,rk3399pro-npu";
15 interrupt-parent = <&gic>;
[all …]
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/power/rk3568-power.h>
13 #include <dt-bindings/soc/rockchip-system-status.h>
14 #include <dt-bindings/suspend/rockchip-rk3568.h>
[all …]
H A Drk3588.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy-snps-pcie3.h>
8 #include "rk3588-vccio3-pinctrl.dtsi"
30 rkcif_mipi_lvds4: rkcif-mipi-lvds4 {
31 compatible = "rockchip,rkcif-mipi-lvds";
37 rkcif_mipi_lvds4_sditf: rkcif-mipi-lvds4-sditf {
38 compatible = "rockchip,rkcif-sditf";
43 rkcif_mipi_lvds4_sditf_vir1: rkcif-mipi-lvds4-sditf-vir1 {
44 compatible = "rockchip,rkcif-sditf";
49 rkcif_mipi_lvds4_sditf_vir2: rkcif-mipi-lvds4-sditf-vir2 {
[all …]
H A Drk3399.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/soc/rockchip-system-status.h>
14 #include <dt-bindings/suspend/rockchip-rk3399.h>
[all …]
/OK3568_Linux_fs/u-boot/drivers/phy/
H A Dti-pipe3-phy.c2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
3 * Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <generic-phy.h>
14 #include <syscon.h>
44 /* PHY POWER CONTROL Register */
94 struct pipe3_dpll_map *dpll_map = pipe3->dpll_map; in omap_pipe3_get_dpll_params()
98 for (; dpll_map->rate; dpll_map++) { in omap_pipe3_get_dpll_params()
99 if (rate == dpll_map->rate) in omap_pipe3_get_dpll_params()
100 return &dpll_map->params; in omap_pipe3_get_dpll_params()
[all …]
H A Dphy-rockchip-snps-pcie3.c1 // SPDX-License-Identifier: GPL-2.0
3 * Rockchip PCIE3.0 phy driver
12 #include <generic-phy.h>
13 #include <syscon.h>
17 #include <reset-uclass.h>
65 #include "phy-rockchip-snps-pcie3.fw"
74 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON9, in rockchip_p3phy_rk3568_init()
78 if (priv->is_bifurcation) { in rockchip_p3phy_rk3568_init()
79 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON6, in rockchip_p3phy_rk3568_init()
81 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON1, in rockchip_p3phy_rk3568_init()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/memory/mt2712-larb-port.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt2712-power.h>
14 #include "mt2712-pinfunc.h"
18 interrupt-parent = <&sysirq>;
19 #address-cells = <2>;
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/ti/
H A Dphy-ti-pipe3.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * phy-ti-pipe3 - PIPE3 PHY driver.
5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
12 #include <linux/phy/phy.h>
19 #include <linux/phy/omap_control_phy.h>
21 #include <linux/mfd/syscon.h>
177 unsigned int dpll_reset_reg; /* reg. index within syscon */
178 unsigned int power_reg; /* power reg. index within syscon */
179 unsigned int pcie_pcs_reg; /* pcs reg. index in syscon */
215 /* DRA75x TRM Table 26-17 Preferred USB3_PHY_RX SCP Register Settings */
[all …]
H A Dphy-dm816x-usb.c24 #include <linux/phy/phy.h>
27 #include <linux/mfd/syscon.h>
32 * phy as being SR70LX Synopsys USB 2.0 OTG nanoPHY. It also seems at
42 * Finally, the phy on dm814x and am335x is different from dm816x.
45 #define DM816X_USB_CTRL_PHYSLEEP1 BIT(1) /* Enable the first phy */
46 #define DM816X_USB_CTRL_PHYSLEEP0 BIT(0) /* Enable the second phy */
53 struct regmap *syscon; member
57 struct usb_phy phy; member
64 otg->host = host; in dm816x_usb_phy_set_host()
66 otg->state = OTG_STATE_UNDEFINED; in dm816x_usb_phy_set_host()
[all …]
/OK3568_Linux_fs/kernel/drivers/media/platform/omap3isp/
H A Dispcsiphy.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - CSI PHY module
23 static void csiphy_routing_cfg_3630(struct isp_csiphy *phy, in csiphy_routing_cfg_3630() argument
30 regmap_read(phy->isp->syscon, phy->isp->syscon_offset, &reg); in csiphy_routing_cfg_3630()
65 regmap_write(phy->isp->syscon, phy->isp->syscon_offset, reg); in csiphy_routing_cfg_3630()
68 static void csiphy_routing_cfg_3430(struct isp_csiphy *phy, u32 iface, bool on, in csiphy_routing_cfg_3430() argument
79 regmap_write(phy->isp->syscon, phy->isp->syscon_offset, 0); in csiphy_routing_cfg_3430()
86 regmap_write(phy->isp->syscon, phy->isp->syscon_offset, csirxfe); in csiphy_routing_cfg_3430()
90 * Configure OMAP 3 CSI PHY routing.
91 * @phy: relevant phy device
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dmediatek-net.txt10 - compatible: Should be
11 "mediatek,mt2701-eth": for MT2701 SoC
12 "mediatek,mt7623-eth", "mediatek,mt2701-eth": for MT7623 SoC
13 "mediatek,mt7622-eth": for MT7622 SoC
14 "mediatek,mt7629-eth": for MT7629 SoC
15 "ralink,rt5350-eth": for Ralink Rt5350F and MT7628/88 SoC
16 - reg: Address and length of the register set for the device
17 - interrupts: Should contain the three frame engines interrupts in numeric
19 - clocks: the clock used by the core
20 - clock-names: the names of the clock listed in the clocks property. These are
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
[all …]

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