Searched +full:sun8i +full:- +full:h3 +full:- +full:spi (Results 1 – 16 of 16) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A31 SPI Controller Device Tree Bindings10 - $ref: "spi-controller.yaml"13 - Chen-Yu Tsai <wens@csie.org>14 - Maxime Ripard <mripard@kernel.org>17 "#address-cells": true18 "#size-cells": true[all …]
4 * This file is dual-licensed: you can use it either under the terms43 #include <dt-bindings/clock/sun8i-de2.h>44 #include <dt-bindings/clock/sun8i-h3-ccu.h>45 #include <dt-bindings/clock/sun8i-r-ccu.h>46 #include <dt-bindings/interrupt-controller/arm-gic.h>47 #include <dt-bindings/reset/sun8i-de2.h>48 #include <dt-bindings/reset/sun8i-h3-ccu.h>49 #include <dt-bindings/reset/sun8i-r-ccu.h>52 interrupt-parent = <&gic>;53 #address-cells = <1>;[all …]
1 # SPDX-License-Identifier: GPL-2.02 dtb-$(CONFIG_ARCH_ALPINE) += \3 alpine-db.dtb4 dtb-$(CONFIG_MACH_ARTPEC6) += \5 artpec6-devboard.dtb6 dtb-$(CONFIG_MACH_ASM9260) += \7 alphascale-asm9260-devkit.dtb9 dtb-$(CONFIG_SOC_AT91RM9200) += \12 dtb-$(CONFIG_SOC_AT91SAM9) += \14 at91-qil_a9260.dtb \[all …]
4 * Based on sun8i-h3-orangepi-one.dts, which is:7 * This file is dual-licensed: you can use it either under the terms46 /dts-v1/;47 #include "sun8i-h3.dtsi"48 #include "sunxi-common-regulators.dtsi"50 #include <dt-bindings/gpio/gpio.h>51 #include <dt-bindings/input/input.h>55 compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus";59 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */65 stdout-path = "serial0:115200n8";[all …]
2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>5 * This file is dual-licensed: you can use it either under the terms44 #include <dt-bindings/interrupt-controller/arm-gic.h>45 #include <dt-bindings/clock/sun8i-de2.h>46 #include <dt-bindings/clock/sun8i-r40-ccu.h>47 #include <dt-bindings/clock/sun8i-tcon-top.h>48 #include <dt-bindings/reset/sun8i-r40-ccu.h>49 #include <dt-bindings/reset/sun8i-de2.h>50 #include <dt-bindings/thermal/thermal.h>53 #address-cells = <1>;[all …]
4 * This file is dual-licensed: you can use it either under the terms43 #include <dt-bindings/interrupt-controller/arm-gic.h>44 #include <dt-bindings/clock/sun8i-v3s-ccu.h>45 #include <dt-bindings/reset/sun8i-v3s-ccu.h>46 #include <dt-bindings/clock/sun8i-de2.h>49 #address-cells = <1>;50 #size-cells = <1>;51 interrupt-parent = <&gic>;54 #address-cells = <1>;55 #size-cells = <1>;[all …]
4 Subject: [PATCH 3/3] ARM: dts: orange-pi-zero: enable spidev6 On orange-pi-zero board SPI1 pins are accessible via GPIO expansion port.9 Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>10 ---11 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 11 +++++++++++14 diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-or…16 --- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts17 +++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts18 @@ -59,6 +59,7 @@20 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */[all …]
1 # SPDX-License-Identifier: (GPL-2.0+ OR X11)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>19 - description: Allwinner A100 Perf1 Board21 - const: allwinner,a100-perf122 - const: allwinner,sun50i-a10024 - description: Allwinner A23 Evaluation Board26 - const: allwinner,sun8i-a23-evb[all …]
4 default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM6412 ---help---24 ---help---26 as the original A10 (mach-sun4i).30 ---help---37 ---help---39 DesignWare controller used in H3, mainly SoCs after H3, which do40 not have official open-source DRAM initialization code, but can41 use modified H3 DRAM initialization code.46 ---help---[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 // based on the Allwinner H3 dtsi:6 #include <dt-bindings/clock/sun50i-a64-ccu.h>7 #include <dt-bindings/clock/sun8i-de2.h>8 #include <dt-bindings/clock/sun8i-r-ccu.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/reset/sun50i-a64-ccu.h>11 #include <dt-bindings/reset/sun8i-de2.h>12 #include <dt-bindings/reset/sun8i-r-ccu.h>13 #include <dt-bindings/thermal/thermal.h>[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/clock/sun50i-h6-ccu.h>6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>7 #include <dt-bindings/clock/sun8i-de2.h>8 #include <dt-bindings/clock/sun8i-tcon-top.h>9 #include <dt-bindings/reset/sun50i-h6-ccu.h>10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>11 #include <dt-bindings/reset/sun8i-de2.h>12 #include <dt-bindings/thermal/thermal.h>[all …]
20 stand-alone devices. Useful in particular for systems that support21 DM_ETH and have a stand-alone MDIO hardware block shared by multiple23 This is currently implemented in net/mdio-uclass.c61 bool "Altera Triple-Speed Ethernet MAC support"65 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.66 Please find details on the "Triple-Speed Ethernet MegaCore Function123 bool "Allow access to the Intel 8257x SPI bus"126 Allow generic access to the SPI bus on the Intel 8257x, for130 bool "Enable SPI bus utility code"133 Utility code for direct access to the SPI bus on Intel 8257x.[all …]
1 // SPDX-License-Identifier: GPL-2.03 // mcp251xfd - Microchip MCP251xFD Family CAN controller driver6 // Marc Kleine-Budde <kernel@pengutronix.de>10 // CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface91 return __mcp251xfd_get_model_str(priv->devtype_data.model); in mcp251xfd_get_model_str()120 if (!priv->reg_vdd) in mcp251xfd_vdd_enable()123 return regulator_enable(priv->reg_vdd); in mcp251xfd_vdd_enable()128 if (!priv->reg_vdd) in mcp251xfd_vdd_disable()131 return regulator_disable(priv->reg_vdd); in mcp251xfd_vdd_disable()137 if (!priv->reg_xceiver) in mcp251xfd_transceiver_enable()[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * Copyright (C) 2012 - 2014 Allwinner Tech7 * Maxime Ripard <maxime.ripard@free-electrons.com>22 #include <linux/spi/spi.h>100 return readl(sspi->base_addr + reg); in sun6i_spi_read()105 writel(value, sspi->base_addr + reg); in sun6i_spi_write()138 while (len--) { in sun6i_spi_drain_fifo()139 byte = readb(sspi->base_addr + SUN6I_RXDATA_REG); in sun6i_spi_drain_fifo()140 if (sspi->rx_buf) in sun6i_spi_drain_fifo()141 *sspi->rx_buf++ = byte; in sun6i_spi_drain_fifo()[all …]
... -boot-2021.07/.readthedocs.yml u-boot-2021.07/Kbuild u-boot-2021.07 ...
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]