| /OK3568_Linux_fs/kernel/drivers/spi/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # SPI driver configuration
5 menuconfig SPI config
6 bool "SPI support"
10 protocol. Chips that support SPI can have data transfer rates
12 controller and a chipselect. Most SPI slaves don't support
13 dynamic device discovery; some are even write-only or read-only.
15 SPI is widely used by microcontrollers to talk with sensors,
16 eeprom and flash memory, codecs and various other controller
17 chips, analog to digital (and d-to-a) converters, and more.
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| H A D | spi-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // STMicroelectronics STM32 SPI Controller driver (master mode only)
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
19 #include <linux/spi/spi.h>
23 /* STM32F4 SPI registers */
72 /* STM32F4 SPI Baud Rate min/max divisor */
76 /* STM32H7 SPI registers */
153 /* STM32H7 SPI Master Baud Rate min/max divisor */
157 /* STM32H7 SPI Communication mode */
163 /* SPI Communication type */
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| H A D | spi-qup.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014, The Linux foundation. All rights reserved.
17 #include <linux/spi/spi.h>
19 #include <linux/dma-mapping.h>
116 #define SPI_MAX_XFER (SZ_64K - 64)
141 int w_size; /* bytes per SPI word */
154 static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer);
156 static inline bool spi_qup_is_flag_set(struct spi_qup *controller, u32 flag) in spi_qup_is_flag_set() argument
158 u32 opflag = readl_relaxed(controller->base + QUP_OPERATIONAL); in spi_qup_is_flag_set()
172 static inline unsigned int spi_qup_len(struct spi_qup *controller) in spi_qup_len() argument
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| H A D | spi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // SPI init/core code
11 #include <linux/dma-mapping.h>
16 #include <linux/clk/clk-conf.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/spi-mem.h>
38 #include <trace/events/spi.h>
48 struct spi_device *spi = to_spi_device(dev); in spidev_release() local
50 spi_controller_put(spi->controller); in spidev_release()
51 kfree(spi->driver_override); in spidev_release()
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| H A D | spi-cadence.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Cadence SPI controller driver (master mode only)
5 * Copyright (C) 2008 - 2014 Xilinx, Inc.
7 * based on Blackfin On-Chip SPI Driver (spi_bfin5xx.c)
20 #include <linux/spi/spi.h>
23 #define CDNS_SPI_NAME "cdns-spi"
40 * SPI Configuration Register bit Masks
43 * of the SPI controller
61 * SPI Configuration Register - Baud rate and slave select
74 * SPI Interrupt Registers bit Masks
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| H A D | spi-mux.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // General Purpose SPI multiplexer
10 #include <linux/spi/spi.h>
12 #define SPI_MUX_NO_CS ((unsigned int)-1)
17 * This driver supports a MUX on an SPI bus. This can be useful when you need
21 * The driver will create an additional SPI controller. Devices added under the
22 * mux will be handled as 'chip selects' on this controller.
26 * struct spi_mux_priv - the basic spi_mux structure
27 * @spi: pointer to the device struct attached to the parent
28 * spi controller
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| H A D | spi-pxa2xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
28 #include <linux/spi/pxa2xx_spi.h>
29 #include <linux/spi/spi.h>
31 #include "spi-pxa2xx.h"
34 MODULE_DESCRIPTION("PXA2xx SSP SPI Controller");
36 MODULE_ALIAS("platform:pxa2xx-spi");
78 /* LPSS offset from drv_data->ioaddr */
80 /* Register offsets from drv_data->lpss_base or -1 */
104 .reg_capabilities = -1,
114 .reg_capabilities = -1,
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| H A D | spi-at91-usart.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Driver for AT91 USART Controllers as SPI
12 #include <linux/dma-direction.h>
22 #include <linux/spi/spi.h>
70 readl_relaxed((port)->regs + US_##reg)
72 writel_relaxed((value), (port)->regs + US_##reg)
75 readb_relaxed((port)->regs + US_##reg)
77 writeb_relaxed((value), (port)->regs + US_##reg)
110 aus->current_rx_remaining_bytes = 0; in dma_callback()
111 complete(&aus->xfer_completion); in dma_callback()
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| H A D | spi-pxa2xx-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * PXA2xx SPI DMA engine support.
10 #include <linux/dma-mapping.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/pxa2xx_spi.h>
18 #include "spi-pxa2xx.h"
23 struct spi_message *msg = drv_data->controller->cur_msg; in pxa2xx_spi_dma_transfer_complete()
29 * by using ->dma_running. in pxa2xx_spi_dma_transfer_complete()
31 if (atomic_dec_and_test(&drv_data->dma_running)) { in pxa2xx_spi_dma_transfer_complete()
34 * might not know about the error yet. So we re-check the in pxa2xx_spi_dma_transfer_complete()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/ |
| H A D | snps,dw-apb-ssi.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
13 - $ref: "spi-controller.yaml#"
14 - if:
19 - mscc,ocelot-spi
20 - mscc,jaguar2-spi
25 - if:
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| H A D | spi-samsung.txt | 1 * Samsung SPI Controller
3 The Samsung SPI controller is used to interface with various devices such as flash
4 and display controllers using the SPI communication interface.
8 - compatible: should be one of the following.
9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10 - samsung,s3c6410-spi: for s3c6410 platforms
11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
12 - samsung,exynos5433-spi: for exynos5433 compatible controllers
13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
15 - reg: physical base address of the controller and length of memory mapped
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| H A D | mediatek,spi-mtk-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Serial NOR flash controller for MediaTek ARM SoCs
10 - Bayi Cheng <bayi.cheng@mediatek.com>
11 - Chuanhong Guo <gch981213@gmail.com>
14 This spi controller support single, dual, or quad mode transfer for
15 SPI NOR flash. There should be only one spi slave device following
16 generic spi bindings. It's not recommended to use this controller
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| H A D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Generic Binding
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-[0-9a-f])*$"
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| H A D | brcm,spi-bcm-qspi.txt | 1 Broadcom SPI controller
3 The Broadcom SPI controller is a SPI master found on various SOCs, including
4 BRCMSTB (BCM7XXX), Cygnus, NSP and NS2. The Broadcom Master SPI hw IP consits
6 MSPI : SPI master controller can read and write to a SPI slave device
7 BSPI : Broadcom SPI in combination with the MSPI hw IP provides acceleration
9 io with 3-byte and 4-byte addressing support.
11 Supported Broadcom SoCs have one instance of MSPI+BSPI controller IP.
14 use SPI protocol.
18 - #address-cells:
19 Must be <1>, as required by generic SPI binding.
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| /OK3568_Linux_fs/kernel/drivers/mtd/spi-nor/controllers/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Aspeed flash controllers in SPI mode"
7 This enables support for the Firmware Memory controller (FMC)
8 in the Aspeed AST2500/AST2400 SoCs when attached to SPI NOR chips,
9 and support for the SPI flash memory controller (SPI) for
10 the host firmware. The implementation only supports SPI NOR.
13 tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"
17 This enables support for HiSilicon FMC SPI NOR flash controller.
20 tristate "NXP SPI Flash Interface (SPIFI)"
24 Enable support for the NXP LPC SPI Flash Interface controller.
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| /OK3568_Linux_fs/u-boot/drivers/spi/ |
| H A D | Kconfig | 1 menuconfig SPI config
2 bool "SPI Support"
4 if SPI
7 bool "Enable Driver Model for SPI drivers"
10 Enable driver model for SPI. The SPI slave interface
12 the SPI uclass. Drivers provide methods to access the SPI
14 include/spi.h. The existing spi_slave structure is attached
16 typically use driver-private data instead of extending the
20 bool "SPI memory extension"
22 Enable this option if you want to enable the SPI memory extension.
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| /OK3568_Linux_fs/kernel/Documentation/spi/ |
| H A D | spi-summary.rst | 2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a master/slave configuration.
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
24 in parallel. All SPI slaves support chipselects; they are usually active
29 SPI slave functions are usually not interoperable between vendors
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| /OK3568_Linux_fs/kernel/drivers/clk/qcom/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
32 tristate "MSM8916 APCS Clock Controller"
35 Support for the APCS Clock Controller on msm8916 devices. The
41 tristate "MSM8996 CPU Clock Controller"
45 Support for the CPU clock controller on msm8996 devices.
50 tristate "RPM based Clock Controller"
63 tristate "RPM over SMD based Clock Controller"
85 tristate "APQ8084 Global Clock Controller"
88 Support for the global clock controller on apq8084 devices.
89 Say Y if you want to use peripheral devices such as UART, SPI,
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| /OK3568_Linux_fs/kernel/include/linux/spi/ |
| H A D | spi.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later
26 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
27 * and SPI infrastructure.
32 * struct spi_statistics - statistics for spi transfers
35 * @messages: number of spi-messages handled
86 spin_lock_irqsave(&(stats)->lock, flags); \
87 (stats)->field += count; \
88 spin_unlock_irqrestore(&(stats)->lock, flags); \
95 * struct spi_delay - SPI delay information
111 * struct spi_device - Controller side proxy for an SPI slave device
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| H A D | spi-mem.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
14 #include <linux/spi/spi.h>
59 * enum spi_mem_data_dir - describes the direction of a SPI memory data
60 * transfer from the controller perspective
62 * @SPI_MEM_DATA_IN: data coming from the SPI memory
63 * @SPI_MEM_DATA_OUT: data sent to the SPI memory
72 * struct spi_mem_op - describes a SPI memory operation
74 * sent MSB-first.
95 * @data.buf.in: input buffer (must be DMA-able)
96 * @data.buf.out: output buffer (must be DMA-able)
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| /OK3568_Linux_fs/kernel/Documentation/driver-api/mtd/ |
| H A D | spi-nor.rst | 2 SPI NOR framework
5 Part I - Why do we need this framework?
6 ---------------------------------------
8 SPI bus controllers (drivers/spi/) only deal with streams of bytes; the bus
9 controller operates agnostic of the specific device attached. However, some
10 controllers (such as Freescale's QuadSPI controller) cannot easily handle
11 arbitrary streams of bytes, but rather are designed specifically for SPI NOR.
13 In particular, Freescale's QuadSPI controller must know the NOR commands to
14 find the right LUT sequence. Unfortunately, the SPI subsystem has no notion of
15 opcodes, addresses, or data payloads; a SPI controller simply knows to send or
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/ |
| H A D | aspeed-smc.txt | 1 * Aspeed Firmware Memory controller
2 * Aspeed SPI Flash Memory Controller
4 The Firmware Memory Controller in the Aspeed AST2500 SoC supports
5 three chip selects, two of which are always of SPI type and the third
6 can be SPI or NOR type flash. These bindings only describe SPI.
8 The two SPI flash memory controllers in the AST2500 each support two
12 - compatible : Should be one of
13 "aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller
14 "aspeed,ast2400-spi" for the AST2400 SPI Flash memory Controller
15 "aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller
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| /OK3568_Linux_fs/kernel/include/trace/events/ |
| H A D | spi.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 #define TRACE_SYSTEM spi
13 TP_PROTO(struct spi_controller *controller),
15 TP_ARGS(controller),
22 __entry->bus_num = controller->bus_num;
25 TP_printk("spi%d", (int)__entry->bus_num)
31 TP_PROTO(struct spi_controller *controller),
33 TP_ARGS(controller)
39 TP_PROTO(struct spi_controller *controller),
41 TP_ARGS(controller)
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/ |
| H A D | pinctrl-mcp23s08.txt | 2 8-/16-bit I/O expander with serial interface (I2C/SPI)
5 - compatible : Should be
6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version
7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version
8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or
9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip
11 - "microchip,mcp23s08" for 8 GPIO SPI version
12 - "microchip,mcp23s17" for 16 GPIO SPI version
13 - "microchip,mcp23s18" for 16 GPIO SPI version
14 - "microchip,mcp23008" for 8 GPIO I2C version or
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| /OK3568_Linux_fs/u-boot/doc/SPI/ |
| H A D | README.dual-flash | 1 SPI/QSPI Dual flash connection modes:
4 This describes how SPI/QSPI flash memories are connected to a given
5 controller in a single chip select line.
8 to a given controller with single chip select line, but there are some
10 connected with a single chip select line from a controller.
12 "dual_flash" from include/spi.h describes these types of connection mode
15 --------------------
17 - single spi flash memory connected with single chip select line.
19 +------------+ CS +---------------+
20 | |----------------------->| |
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