Searched +full:smmu +full:- +full:secure +full:- +full:config +full:- +full:access (Results 1 – 14 of 14) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only3 ---4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Will Deacon <will@kernel.org>11 - Robin Murphy <Robin.Murphy@arm.com>18 The SMMU may also raise interrupts in response to various fault23 pattern: "^iommu@[0-9a-f]*"26 - description: Qcom SoCs implementing "arm,smmu-v2"28 - enum:[all …]
1 // SPDX-License-Identifier: GPL-2.0-only2 // Miscellaneous Arm SMMU implementation and integration quirks5 #define pr_fmt(fmt) "arm-smmu: " fmt10 #include "arm-smmu.h"28 static u32 arm_smmu_read_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_read_ns() argument33 return readl_relaxed(arm_smmu_page(smmu, page) + offset); in arm_smmu_read_ns()36 static void arm_smmu_write_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_write_ns() argument41 writel_relaxed(val, arm_smmu_page(smmu, page) + offset); in arm_smmu_write_ns()44 /* Since we don't care for sGFAR, we can do without 64-bit accessors */52 struct arm_smmu_device smmu; member[all …]
1 // SPDX-License-Identifier: GPL-2.02 #include "juno-clocks.dtsi"3 #include "juno-motherboard.dtsi"11 compatible = "arm,armv7-timer-mem";13 clock-frequency = <50000000>;14 #address-cells = <1>;15 #size-cells = <1>;19 frame-number = <1>;30 interrupt-names = "mhu_lpri_rx",32 #mbox-cells = <1>;[all …]
2 * (C) Copyright 2014-2015 Freescale Semiconductor4 * SPDX-License-Identifier: GPL-2.0+9 #include <config.h>13 #include <asm/arch-fsl-layerscape/soc.h>18 #include <asm/arch-fsl-layerscape/immap_lsch3.h>20 #include <asm/u-boot.h>80 /* Set Wuo bit for RN-I 20 */87 * Set forced-order mode in RNI-6, RNI-2089 * LS2080A family does not support setting forced-order mode,107 /* Add fully-coherent masters to DVM domain */[all …]
2 * Header file describing the internal (inter-module) DHD interfaces.24 * <<Broadcom-WL-IPTag/Open:>>58 /* The kernel threading is sdio-specific */154 DHD_BUS_LOAD, /* Download access only (CPU reset) */198 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_TX200 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_SEND_PKT202 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_DPC204 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_WD206 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_IOVAR208 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_DHD_IOVAR[all …]
21 * <<Broadcom-WL-IPTag/Open:>>127 /* XXX defines for 43602a0 workaround JIRA CRWLARMCR4-53 */150 * Increase SSReset de-assert time to 8ms.151 * since it takes longer time if re-scan time on 4378B0.157 (bus)->shared_addr + OFFSETOF(pciedev_shared_t, member)161 (bus)->pcie_sh->rings_info_ptr + OFFSETOF(ring_info_t, member)165 (bus)->ring_sh[ringid].ring_mem_addr + OFFSETOF(ring_mem_t, member)668 return bus->flr_force_fail; in dhd_bus_get_flr_force_fail()714 uint dar_addr = DAR_PCIH2D_DB0_0(bus->sih->buscorerev); in dhd_bus_db0_addr_get()717 if (bus->dma_chan == 1) { in dhd_bus_db0_addr_get()[all …]
2 * Header file describing the internal (inter-module) DHD interfaces.24 * <<Broadcom-WL-IPTag/Open:>>60 /* The kernel threading is sdio-specific */156 DHD_BUS_LOAD, /* Download access only (CPU reset) */200 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_TX202 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_SEND_PKT204 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_DPC206 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_WD208 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_IOVAR210 (dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_DHD_IOVAR[all …]
6 * Copyright (C) 1999-2017, Broadcom Corporation27 * <<Broadcom-WL-IPTag/Open:>>29 * $Id: dhd_pcie.c 702835 2017-06-05 07:19:55Z $121 (bus)->shared_addr + OFFSETOF(pciedev_shared_t, member)125 (bus)->pcie_sh->rings_info_ptr + OFFSETOF(ring_info_t, member)129 (bus)->ring_sh[ringid].ring_mem_addr + OFFSETOF(ring_mem_t, member)461 return bus->flr_force_fail; in dhd_bus_get_flr_force_fail()507 uint dar_addr = DAR_PCIH2D_DB0_0(bus->sih->buscorerev); in dhd_bus_db0_addr_get()509 return ((DAR_ACTIVE(bus->dhd)) ? dar_addr : addr); in dhd_bus_db0_addr_get()515 return ((DAR_ACTIVE(bus->dhd)) ? DAR_PCIH2D_DB2_0(bus->sih->buscorerev) : PCIH2D_MailBox_2); in dhd_bus_db0_addr_2_get()[all …]
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]
... then 81 /usr/share/command-not-found/command-not-found -- "$ ...