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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dmvebu-gated-clock.txt12 -----------------------------------
18 5 pex0 PCIe Cntrl 0
21 17 sdio SDHCI Host
29 -----------------------------------
33 5 pex0 PCIe 0 Clock out
40 17 sdio SDHCI Host
56 -----------------------------------
61 5 pex1 PCIe 1
83 -----------------------------------
84 5 pex1 PCIe 1
[all …]
/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A Dsdhci-of-hlwd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/mmc/host/sdhci-of-hlwd.c
9 * Based on sdhci-of-esdhc.c
21 #include "sdhci-pltfm.h"
24 * Ops and quirks for the Nintendo Wii SDHCI controllers.
30 #define SDHCI_HLWD_WRITE_DELAY 5 /* usecs */
75 { .compatible = "nintendo,hollywood-sdhci" },
82 .name = "sdhci-hlwd",
93 MODULE_DESCRIPTION("Nintendo Wii SDHCI OF driver");
/OK3568_Linux_fs/u-boot/drivers/mmc/
H A DKconfig25 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
26 and non-removable (e.g. eMMC chip) devices are supported. These
27 appear as block devices in U-Boot and can support filesystems such
36 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
37 and non-removable (e.g. eMMC chip) devices are supported. These
38 appear as block devices in U-Boot and can support filesystems such
49 you are reading this help text, you most likely have no idea :-)
113 as removeable SD and micro-SD cards.
155 This selects PCI-based MMC controllers.
174 This enables extended-drain in the MMC/SD/SDIO1I/O and
[all …]
H A Dtegra_mmc.c5 * Portions Copyright 2011-2016 NVIDIA Corporation
7 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch-tegra/tegra_mmc.h>
33 unsigned int version; /* SDHCI spec. version */
43 if (power != (unsigned short)-1) { in tegra_mmc_set_power()
61 writeb(pwr, &priv->reg->pwrcon); in tegra_mmc_set_power()
67 writeb(pwr, &priv->reg->pwrcon); in tegra_mmc_set_power()
77 debug("buf: %p (%p), data->blocks: %u, data->blocksize: %u\n", in tegra_mmc_prepare_data()
78 bbstate->bounce_buffer, bbstate->user_buffer, data->blocks, in tegra_mmc_prepare_data()
79 data->blocksize); in tegra_mmc_prepare_data()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dtegra30-tamonten.dtsi5 compatible = "ad,tamonten-ng", "nvidia,tegra30";
12 stdout-path = &uartd;
21 mmc0 = "/sdhci@78000600";
22 mmc1 = "/sdhci@78000400";
23 mmc2 = "/sdhci@78000000";
30 clock-frequency = <100000>;
35 clock-frequency = <100000>;
41 clock-frequency = <100000>;
47 clock-frequency = <100000>;
53 clock-frequency = <100000>;
[all …]
H A Dexynos4.dtsi7 * SPDX-License-Identifier: GPL-2.0+
24 combiner: interrupt-controller@10440000 {
25 compatible = "samsung,exynos4210-combiner";
26 #interrupt-cells = <2>;
27 interrupt-controller;
32 compatible = "samsung,exynos4210-uart";
38 compatible = "samsung,exynos4210-uart";
44 compatible = "samsung,exynos4210-uart";
50 compatible = "samsung,exynos4210-uart";
56 compatible = "samsung,exynos4210-uart";
[all …]
H A Dtegra30.dtsi1 #include <dt-bindings/clock/tegra30-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra30-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&lic>;
13 pcie-controller@00003000 {
14 compatible = "nvidia,tegra30-pcie";
19 reg-names = "pads", "afi", "cs";
22 interrupt-names = "intr", "msi";
[all …]
H A Dtegra114.dtsi1 #include <dt-bindings/clock/tegra114-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra114-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&lic>;
14 compatible = "nvidia,tegra114-host1x", "simple-bus";
20 reset-names = "host1x";
22 #address-cells = <1>;
23 #size-cells = <1>;
[all …]
H A Dtegra210.dtsi1 #include <dt-bindings/clock/tegra210-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra210-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
10 interrupt-parent = <&lic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 pcie-controller@01003000 {
[all …]
H A Dtegra30-apalis.dts1 /dts-v1/;
10 stdout-path = &uarta;
18 mmc0 = "/sdhci@78000600";
19 mmc1 = "/sdhci@78000400";
20 mmc2 = "/sdhci@78000000";
35 pcie-controller@00003000 {
37 avdd-pexa-supply = <&vdd2_reg>;
38 vdd-pexa-supply = <&vdd2_reg>;
39 avdd-pexb-supply = <&vdd2_reg>;
40 vdd-pexb-supply = <&vdd2_reg>;
[all …]
H A Dtegra210-p2371-2180.dts1 /dts-v1/;
6 model = "NVIDIA P2371-2180";
7 compatible = "nvidia,p2371-2180", "nvidia,tegra210";
10 stdout-path = &uarta;
15 mmc0 = "/sdhci@700b0600";
16 mmc1 = "/sdhci@700b0000";
24 pcie-controller@01003000 {
37 pinctrl-0 = <&padctl_default>;
38 pinctrl-names = "default";
42 nvidia,lanes = "otg-1", "otg-2";
[all …]
H A Dtegra124-venice2.dts1 /dts-v1/;
10 stdout-path = &uarta;
20 mmc0 = "/sdhci@700b0600";
21 mmc1 = "/sdhci@700b0400";
35 clock-frequency = <100000>;
40 clock-frequency = <100000>;
45 clock-frequency = <100000>;
50 clock-frequency = <100000>;
55 clock-frequency = <400000>;
60 clock-frequency = <400000>;
[all …]
H A Darmada-37xx.dtsi6 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/comphy/comphy_data.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <2>;
55 #size-cells = <2>;
62 #address-cells = <1>;
63 #size-cells = <0>;
66 compatible = "arm,cortex-a53", "arm,armv8";
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-s3c/
H A Dsetup-sdhci-gpio-s3c24xx.c1 // SPDX-License-Identifier: GPL-2.0
6 // S3C2416 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
8 // Based on mach-s3c64xx/setup-sdhci-gpio.c
17 #include "regs-gpio.h"
18 #include "gpio-samsung.h"
19 #include "gpio-cfg.h"
20 #include "sdhci.h"
24 s3c_gpio_cfgrange_nopull(S3C2410_GPE(5), 2 + width, S3C_GPIO_SFN(2)); in s3c2416_setup_sdhci0_cfg_gpio()
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
17 #include "clk-pll.h"
98 /* S3C6400-specific parent clocks. */
103 /* S3C6410-specific parent clocks. */
142 MUX(MOUT_UHOST, "mout_uhost", uhost_p6400, CLK_SRC, 5, 2),
150 MUX(MOUT_UHOST, "mout_uhost", uhost_p6410, CLK_SRC, 5, 2),
216 GATE_BUS(HCLK_POST0, "hclk_post0", "hclk", HCLK_GATE, 5),
240 GATE_BUS(PCLK_WDT, "pclk_wdt", "pclk", PCLK_GATE, 5),
[all …]
H A Dclk-s3c2443.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/s3c2443.h>
18 #include "clk-pll.h"
89 { .val = 2, .div = 5 },
92 { .val = 5, .div = 11 },
121 GATE(HCLK_USBD, "usb-device", "hclk", HCLKCON, 12, 0, 0),
122 GATE(HCLK_USBH, "usb-host", "hclk", HCLKCON, 11, 0, 0),
124 GATE(HCLK_DMA5, "dma5", "hclk", HCLKCON, 5, CLK_IGNORE_UNUSED, 0),
152 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Ds3c64xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
37 compatible = "arm,arm1176jzf-s";
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
[all …]
H A Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
H A Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
H A Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
[all …]
/OK3568_Linux_fs/u-boot/include/
H A Dsdhci.h5 * SPDX-License-Identifier: GPL-2.0+
8 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
35 #define SDHCI_TRNS_MULTI BIT(5)
78 #define SDHCI_CTRL_8BITBUS BIT(5)
101 #define SDHCI_PROG_CLOCK_MODE BIT(5)
120 #define SDHCI_INT_DATA_AVAIL BIT(5)
145 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
149 /* 3E-3F reserved */
193 /* 4C-4F reserved for more max current */
200 /* 55-57 reserved */
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/marvell/
H A Darmada-37xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
25 reserved-memory {
26 #address-cells = <2>;
27 #size-cells = <2>;
34 psci-area@4000000 {
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-mmp/
H A Dmmp2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-mmp/mmp2.c
18 #include <asm/hardware/cache-tauros2.h>
21 #include "addr-map.h"
22 #include "regs-apbc.h"
28 #include "pm-mmp2.h"
137 /* on-chip devices */
138 MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
139 MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
140 MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23);
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/
H A Dwii.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2008-2009 The GameCube Linux Team
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
15 * This is commented-out for now.
25 #address-cells = <1>;
26 #size-cells = <1>;
29 bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal";
34 reg = <0x00000000 0x01800000 /* MEM1 24MB 1T-SRAM */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl_spear.txt4 - compatible : "st,spear300-pinmux"
5 : "st,spear310-pinmux"
6 : "st,spear320-pinmux"
7 : "st,spear1310-pinmux"
8 : "st,spear1340-pinmux"
9 - reg : Address range of the pinctrl registers
10 - st,pinmux-mode: Mandatory for SPEAr300 and SPEAr320 and invalid for others.
11 - Its values for SPEAr300:
12 - NAND_MODE : <0>
13 - NOR_MODE : <1>
[all …]

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