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Searched +full:pwm +full:- +full:active +full:- +full:state (Results 1 – 25 of 318) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/video/backlight/
H A Dpwm_bl.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Simple PWM based backlight control, board code has to setup
4 * 1) pin configuration so PWM waveforms can output
17 #include <linux/pwm.h>
25 "pwm bl quiescent when reboot quiescent [default=false]");
28 struct pwm_device *pwm; member
49 struct pwm_state state; in pwm_backlight_power_on() local
52 pwm_get_state(pb->pwm, &state); in pwm_backlight_power_on()
53 if (pb->enabled) in pwm_backlight_power_on()
56 err = regulator_enable(pb->power_supply); in pwm_backlight_power_on()
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/OK3568_Linux_fs/kernel/drivers/pwm/
H A Dpwm-jz4740.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
4 * JZ4740 platform PWM support
7 * - The .apply callback doesn't complete the currently running period before
15 #include <linux/mfd/ingenic-tcu.h>
20 #include <linux/pwm.h>
40 /* Enable all TCU channels for PWM use by default except channels 0/1 */ in jz4740_pwm_can_use_chn()
41 u32 pwm_channels_mask = GENMASK(jz->chip.npwm - 1, 2); in jz4740_pwm_can_use_chn()
43 device_property_read_u32(jz->chip.dev->parent, in jz4740_pwm_can_use_chn()
44 "ingenic,pwm-channels-mask", in jz4740_pwm_can_use_chn()
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H A Dpwm-omap-dmtimer.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Also based on pwm-samsung.c
13 * PWM driver / controller, using the OMAP's dual-mode timers
15 * reloaded with the load value and the pwm output goes up.
20 * - When PWM is stopped, timer counter gets stopped immediately. This
21 * doesn't allow the current PWM period to complete and stops abruptly.
22 * - When PWM is running and changing both duty cycle and period,
25 * is updated while the pwm pin is high, current pwm period/duty_cycle
27 * - period for current cycle = current_period + new period
28 * - duty_cycle for current period = current period + new duty_cycle.
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H A Dpwm-renesas-tpu.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Mobile TPU PWM driver
18 #include <linux/pwm.h>
63 TPU_PIN_PWM, /* Pin is driven by PWM */
64 TPU_PIN_ACTIVE, /* Pin is driven active */
92 static void tpu_pwm_write(struct tpu_pwm_device *pwm, int reg_nr, u16 value) in tpu_pwm_write() argument
94 void __iomem *base = pwm->tpu->base + TPU_CHANNEL_OFFSET in tpu_pwm_write()
95 + pwm->channel * TPU_CHANNEL_SIZE; in tpu_pwm_write()
100 static void tpu_pwm_set_pin(struct tpu_pwm_device *pwm, in tpu_pwm_set_pin() argument
101 enum tpu_pin_state state) in tpu_pwm_set_pin() argument
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H A Dpwm-stm32.c1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
17 #include <linux/pwm.h>
31 struct mutex lock; /* protect pwm config/enable */
50 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
59 return regmap_write(dev->regmap, TIM_CCR1, value); in write_ccrx()
61 return regmap_write(dev->regmap, TIM_CCR2, value); in write_ccrx()
63 return regmap_write(dev->regmap, TIM_CCR3, value); in write_ccrx()
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H A Dpwm-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PWM driver for Rockchip SoCs
19 #include <linux/pwm.h>
21 #include "pwm-rockchip.h"
56 #define PWM_REG_INTSTS(n) ((3 - (n)) * 0x10 + 0x10)
57 #define PWM_REG_INT_EN(n) ((3 - (n)) * 0x10 + 0x14)
70 bool vop_pwm_en; /* indicate voppwm mirror register state */
100 struct pwm_device *pwm, in rockchip_pwm_get_state() argument
101 struct pwm_state *state) in rockchip_pwm_get_state() argument
104 u32 enable_conf = pc->data->enable_conf; in rockchip_pwm_get_state()
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H A Dpwm-imx-tpm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2018-2019 NXP.
6 * - The TPM counter and period counter are shared between
9 * - Changes to polarity cannot be latched at the time of the
11 * - Changing period and duty cycle together isn't atomic,
24 #include <linux/pwm.h>
49 * together as a 2-bit field here.
57 #define PWM_IMX_TPM_MOD_MOD GENMASK(PWM_IMX_TPM_MOD_WIDTH - 1, 0)
82 * This function determines for a given pwm_state *state that a consumer
90 const struct pwm_state *state) in pwm_imx_tpm_round_state() argument
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/OK3568_Linux_fs/kernel/Documentation/driver-api/
H A Dpwm.rst2 Pulse Width Modulation (PWM) interface
5 This provides an overview about the Linux PWM interface
9 the Linux PWM API (although they could). However, PWMs are often
12 this kind of flexibility the generic PWM API exists.
15 ----------------
17 Users of the legacy PWM API use unique IDs to refer to PWM devices.
19 Instead of referring to a PWM device via its unique ID, board setup code
20 should instead register a static mapping that can be used to match PWM
24 PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL,
36 ----------
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H A Dmiscellaneous.rst4 .. kernel-doc:: include/linux/parport.h
7 .. kernel-doc:: drivers/parport/ieee1284.c
10 .. kernel-doc:: drivers/parport/share.c
13 .. kernel-doc:: drivers/parport/daisy.c
19 .. kernel-doc:: drivers/tty/serial/serial_core.c
22 .. kernel-doc:: drivers/tty/serial/8250/8250_core.c
25 Pulse-Width Modulation (PWM)
28 Pulse-width modulation is a modulation technique primarily used to
31 The PWM framework provides an abstraction for providers and consumers of
32 PWM signals. A controller that provides one or more PWM signals is
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/hwmon/
H A Dadt7475.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jean Delvare <jdelvare@suse.com>
23 https://www.onsemi.com/pub/Collateral/ADT7473-D.PDF
24 https://www.onsemi.com/pub/Collateral/ADT7475-D.PDF
25 https://www.onsemi.com/pub/Collateral/ADT7476-D.PDF
26 https://www.onsemi.com/pub/Collateral/ADT7490-D.PDF
34 - adi,adt7473
35 - adi,adt7475
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/
H A Dnvidia,tegra20-pwm.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pwm": for Tegra20
6 - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30
7 - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114
8 - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124
9 - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
10 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
11 - "nvidia,tegra186-pwm": for Tegra186
12 - "nvidia,tegra194-pwm": for Tegra194
13 - reg: physical base address and length of the controller's registers
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_drm_backlight.c3 * Author:Mark Yao <mark.yao@rock-chips.com>
29 #include <linux/pwm.h>
37 struct pwm_device *pwm; member
56 unsigned int lth = bl->lth_brightness; in compute_duty_cycle()
59 duty_cycle = bl->levels[brightness]; in compute_duty_cycle()
61 return (duty_cycle * (period - lth) / bl->scale) + lth; in compute_duty_cycle()
65 struct pwm_device *pwm, int brightness) in rockchip_pwm_power_on() argument
70 pwm_get_args(pwm, &pargs); in rockchip_pwm_power_on()
72 pwm_config(pwm, duty_cycle, pargs.period); in rockchip_pwm_power_on()
73 pwm_enable(pwm); in rockchip_pwm_power_on()
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3399-khadas-edge.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/pwm/pwm.h>
11 #include "rk3399-opp.dtsi"
15 stdout-path = "serial2:1500000n8";
18 clkin_gmac: external-gmac-clock {
19 compatible = "fixed-clock";
20 clock-frequency = <125000000>;
21 clock-output-names = "clkin_gmac";
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H A Drk3399-roc-pc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
13 model = "Firefly ROC-RK3399-PC Board";
14 compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399";
17 stdout-path = "serial2:1500000n8";
21 compatible = "pwm-backlight";
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H A Drk3399-rockpro64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
14 stdout-path = "serial2:1500000n8";
17 clkin_gmac: external-gmac-clock {
18 compatible = "fixed-clock";
19 clock-frequency = <125000000>;
20 clock-output-names = "clkin_gmac";
21 #clock-cells = <0>;
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H A Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
15 compatible = "pwm-backlight";
16 brightness-levels = <
49 default-brightness-level = <200>;
53 edp_panel: edp-panel {
54 compatible ="lg,lp079qx1-sp0v";
56 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
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H A Drk3368-sheep-lvds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3368-android.dtsi"
17 compatible = "simple-audio-card";
18 simple-audio-card,format = "i2s";
19 simple-audio-card,name = "rockchip,rt5640-codec";
20 simple-audio-card,mclk-fs = <256>;
21 simple-audio-card,widgets =
24 simple-audio-card,routing =
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6qdl-nit6xlite.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 stdout-path = &uart2;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "regulator-fixed";
26 regulator-name = "2P5V";
27 regulator-min-microvolt = <2500000>;
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H A Dsun5i-a13-pocketbook-touch-lux-3.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 /dts-v1/;
7 #include "sun5i-a13.dtsi"
8 #include "sunxi-common-regulators.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/pwm/pwm.h>
16 compatible = "pocketbook,touch-lux-3", "allwinner,sun5i-a13";
26 compatible = "pwm-backlight";
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H A Dimx6qdl-nitrogen6_max.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 stdout-path = &uart2;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "regulator-fixed";
26 regulator-name = "1P8V";
27 regulator-min-microvolt = <1800000>;
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H A Dimx6q-kp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include <dt-bindings/sound/fsl-imx-audmux.h>
16 backlight_lcd: backlight-lcd {
17 compatible = "pwm-backlight";
19 brightness-levels = <0 255>;
20 num-interpolated-steps = <255>;
21 default-brightness-level = <250>;
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H A Drk3288-evb-android-rk808-edp.dtsi4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "rk3288-evb.dtsi"
9 #include "rk3288-android.dtsi"
10 #include <dt-bindings/sensor-dev.h>
14 compatible = "simple-panel";
16 enable-gpios = <&gpio7 RK_PA4 GPIO_ACTIVE_HIGH>;
17 prepare-delay-ms = <120>;
19 display-timings {
20 native-mode = <&timing0>;
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H A Dimx6ul-kontron-n6x1x-s.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
11 gpio-leds {
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
17 label = "debug-led1";
19 default-state = "off";
20 linux,default-trigger = "heartbeat";
24 label = "debug-led2";
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H A Drk3128-evb-ddr3-v10-linux.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/rk-input.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/pwm/pwm.h>
11 #include <dt-bindings/sensor-dev.h>
13 #include "rk312x-android.dtsi"
20 …on=uart8250,mmio32,0x20068000 console=ttyFIQ0 root=PARTUUID=614e0000-0000-4b53-8000-1d28000054a9 r…
23 adc-keys {
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/OK3568_Linux_fs/kernel/include/linux/
H A Dpwm.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * enum pwm_polarity - polarity of a PWM signal
17 * @PWM_POLARITY_NORMAL: a high signal for the duration of the duty-
20 * @PWM_POLARITY_INVERSED: a low signal for the duration of the duty-
30 * struct pwm_args - board-dependent PWM arguments
34 * This structure describes board-dependent arguments attached to a PWM
35 * device. These arguments are usually retrieved from the PWM lookup table or
38 * Do not confuse this with the PWM state: PWM arguments represent the initial
39 * configuration that users want to use on this PWM device rather than the
40 * current PWM hardware state.
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