| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/msm/ |
| H A D | dsi.txt | 1 Qualcomm Technologies Inc. adreno/snapdragon DSI output 3 DSI Controller: 5 - compatible: 6 * "qcom,mdss-dsi-ctrl" 7 - reg: Physical base address and length of the registers of controller 8 - reg-names: The names of register regions. The following regions are required: 10 - interrupts: The interrupt signal from the DSI block. 11 - power-domains: Should be <&mmcc MDSS_GDSC>. 12 - clocks: Phandles to device clocks. 13 - clock-names: the following clocks are required: [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/exynos/ |
| H A D | exynos_dsim.txt | 1 Exynos MIPI DSI Master 4 - compatible: value should be one of the following 5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */ 6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */ 7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */ 8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */ 9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */ 10 - reg: physical base address and length of the registers set for the device 11 - interrupts: should contain DSI interrupt 12 - clocks: list of clock specifiers, must contain an entry for each required [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/ |
| H A D | allwinner,sun6i-a31-mipi-dsi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A31 MIPI-DSI Controller Device Tree Bindings 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - allwinner,sun6i-a31-mipi-dsi 17 - allwinner,sun50i-a64-mipi-dsi 29 - description: Bus Clock [all …]
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| H A D | st,stm32-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DSI host controller 10 - Philippe Cornu <philippe.cornu@st.com> 11 - Yannick Fertre <yannick.fertre@st.com> 14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. 17 - $ref: dsi-controller.yaml# 21 const: st,stm32-dsi [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/ti/ |
| H A D | ti,omap4-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 8 -------- 11 - compatible: "ti,omap4-dss" 12 - reg: address and length of the register space 13 - ti,hwmods: "dss_core" 14 - clocks: handle to fclk 15 - clock-names: "fck" 18 - DISPC 21 - DSS Submodules: RFBI, VENC, DSI, HDMI 22 - Video port for DPI output [all …]
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| H A D | ti,omap5-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 8 -------- 11 - compatible: "ti,omap5-dss" 12 - reg: address and length of the register space 13 - ti,hwmods: "dss_core" 14 - clocks: handle to fclk 15 - clock-names: "fck" 18 - DISPC 21 - DSS Submodules: RFBI, DSI, HDMI 22 - Video port for DPI output [all …]
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| H A D | ti,omap3-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 8 -------- 11 - compatible: "ti,omap3-dss" 12 - reg: address and length of the register space 13 - ti,hwmods: "dss_core" 14 - clocks: handle to fclk 15 - clock-names: "fck" 18 - Video ports: 19 - Port 0: DPI output 20 - Port 1: SDI output [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,mmcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jeffrey Hugo <jhugo@codeaurora.org> 11 - Taniya Das <tdas@codeaurora.org> 20 - qcom,mmcc-apq8064 21 - qcom,mmcc-apq8084 22 - qcom,mmcc-msm8660 23 - qcom,mmcc-msm8960 24 - qcom,mmcc-msm8974 [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/ |
| H A D | nwl-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs 10 - Guido Gúnther <agx@sigxcpu.org> 11 - Robert Chiras <robert.chiras@nxp.com> 14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for 15 the SOCs NWL MIPI-DSI host controller. 18 - $ref: ../dsi-controller.yaml# [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/ |
| H A D | tc358775.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * TC358775 DSI to LVDS bridge driver 35 /* DSI D-PHY Layer Registers */ 50 /* DSI PPI Layer Registers */ 51 #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */ 58 #define PPI_TX_RX_TA 0x013C /* DSI Bus Turn Around timing parameters */ 72 #define CLS_PRE 0x0180 /* Digital Counter inside of PHY IO */ 73 #define D0S_PRE 0x0184 /* Digital Counter inside of PHY IO */ 74 #define D1S_PRE 0x0188 /* Digital Counter inside of PHY IO */ 75 #define D2S_PRE 0x018C /* Digital Counter inside of PHY IO */ [all …]
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| H A D | parade-ps8640.c | 1 // SPDX-License-Identifier: GPL-2.0-only 37 * page[3]: for DSI Link Control1 38 * page[4]: for MIPI Phy 40 * page[6]: for DSI Link Control2 63 struct mipi_dsi_device *dsi; member 79 struct i2c_client *client = ps_bridge->page[PAGE3_DSI_CNTL1]; in ps8640_bridge_vdo_control() 97 struct i2c_client *client = ps_bridge->page[PAGE2_TOP_CNTL]; in ps8640_bridge_poweron() 101 if (ps_bridge->powered) in ps8640_bridge_poweron() 104 ret = regulator_bulk_enable(ARRAY_SIZE(ps_bridge->supplies), in ps8640_bridge_poweron() 105 ps_bridge->supplies); in ps8640_bridge_poweron() [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra210-p2371-2180.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra210-p2180.dtsi" 5 #include "tegra210-p2597.dtsi" 9 compatible = "nvidia,p2371-2180", "nvidia,tegra210"; 14 avdd-pll-uerefe-supply = <&avdd_1v05_pll>; 15 hvddio-pex-supply = <&vdd_1v8>; 16 dvddio-pex-supply = <&vdd_pex_1v05>; 17 dvdd-pex-pll-supply = <&vdd_pex_1v05>; 18 hvdd-pex-pll-e-supply = <&vdd_1v8>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | stm32mp157c-ev1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 /dts-v1/; 8 #include "stm32mp157c-ed1.dts" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 14 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157"; 17 stdout-path = "serial0:115200n8"; 27 clk_ext_camera: clk-ext-camera { 28 #clock-cells = <0>; [all …]
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| H A D | stm32mp157c-dk2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 7 /dts-v1/; 11 #include "stm32mp15-pinctrl.dtsi" 12 #include "stm32mp15xxac-pinctrl.dtsi" 13 #include "stm32mp15xx-dkx.dtsi" 16 model = "STMicroelectronics STM32MP157C-DK2 Discovery Board"; 17 compatible = "st,stm32mp157c-dk2", "st,stm32mp157"; 28 stdout-path = "serial0:115200n8"; 32 &dsi { [all …]
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| H A D | rk3128-evb-ddr3-v10-linux.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/rk-input.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/pwm/pwm.h> 11 #include <dt-bindings/sensor-dev.h> 13 #include "rk312x-android.dtsi" 20 …on=uart8250,mmio32,0x20068000 console=ttyFIQ0 root=PARTUUID=614e0000-0000-4b53-8000-1d28000054a9 r… 23 adc-keys { [all …]
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| H A D | rv1126-evb-v10.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/display/drm_mipi_dsi.h> 7 #include <dt-bindings/input/input.h> 10 adc-keys { 11 compatible = "adc-keys"; 12 io-channels = <&saradc 0>; 13 io-channel-names = "buttons"; 14 poll-interval = <100>; 15 keyup-threshold-microvolt = <1800000>; 17 esc-key { [all …]
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| H A D | qcom-msm8974.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interconnect/qcom,msm8974.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8974.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/reset/qcom,gcc-msm8974.h> 10 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <1>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/ |
| H A D | sdm845-mtp.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 16 compatible = "qcom,sdm845-mtp", "qcom,sdm845"; 23 stdout-path = "serial0:115200n8"; 26 vph_pwr: vph-pwr-regulator { 27 compatible = "regulator-fixed"; 28 regulator-name = "vph_pwr"; 29 regulator-min-microvolt = <3700000>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/ |
| H A D | OK3568-C-common.dtsi | 1 /dts-v1/; 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/pwm/pwm.h> 5 #include <dt-bindings/input/rk-input.h> 6 #include <dt-bindings/display/drm_mipi_dsi.h> 7 #include <dt-bindings/display/rockchip_vop.h> 8 #include <dt-bindings/display/media-bus-format.h> 14 model = "Forlinx OK3568-C Board"; 15 compatible = "forlinx,ok3568", "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568"; 19 video-hdmi = "hdmi"; [all …]
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| H A D | rk3562-test2-ddr4-v10.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 10 #include "rk3562-evb.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/pinctrl/rockchip.h> 16 compatible = "rockchip,rk3562-test2-ddr4-v10", "rockchip,rk3562"; 18 dc_12v: dc-12v { 19 compatible = "regulator-fixed"; 20 regulator-name = "dc_12v"; 21 regulator-always-on; [all …]
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| H A D | px30-z7-a0-rk618-dsi.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/display/drm_mipi_dsi.h> 11 #include <dt-bindings/display/media-bus-format.h> 12 #include <dt-bindings/clock/rk618-cru.h> 14 #include "px30-android.dtsi" 18 compatible = "rockchip,px30-z7-a0", "rockchip,px30"; [all …]
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| H A D | rk3368-808.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/pwm/pwm.h> 9 #include <dt-bindings/sensor-dev.h> 11 #include "rk3368-android.dtsi" 14 rt5640-sound { 15 compatible = "simple-audio-card"; 16 simple-audio-card,format = "i2s"; 17 simple-audio-card,name = "rockchip,rt5640-codec"; [all …]
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| H A D | rk3358-evb-ddr3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/display/drm_mipi_dsi.h> 14 adc-keys { 15 compatible = "adc-keys"; 16 io-channels = <&saradc 2>; 17 io-channel-names = "buttons"; 18 poll-interval = <100>; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/rockchip/ |
| H A D | rockchip-lvds.txt | 5 - compatible: matching the soc type, one of 6 - "rockchip,rk3288-lvds"; 7 - "rockchip,px30-lvds"; 9 - reg: physical base address of the controller and length 11 - clocks: must include clock specifiers corresponding to entries in the 12 clock-names property. 13 - clock-names: must contain "pclk_lvds" 15 - avdd1v0-supply: regulator phandle for 1.0V analog power 16 - avdd1v8-supply: regulator phandle for 1.8V analog power 17 - avdd3v3-supply: regulator phandle for 3.3V analog power [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/ |
| H A D | sun50i-a64-nanopi-a64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 /dts-v1/; 6 #include "sun50i-a64.dtsi" 7 #include "sun50i-a64-cpu-opp.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 13 compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64"; 21 stdout-path = "serial0:115200n8"; 24 hdmi-connector { 25 compatible = "hdmi-connector"; 30 remote-endpoint = <&hdmi_out_con>; [all …]
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