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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/exynos/
H A Dexynos5433-bus.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 compatible = "samsung,exynos-bus";
13 clock-names = "bus";
14 operating-points-v2 = <&bus_g2d_400_opp_table>;
19 compatible = "samsung,exynos-bus";
21 clock-names = "bus";
22 operating-points-v2 = <&bus_g2d_266_opp_table>;
27 compatible = "samsung,exynos-bus";
29 clock-names = "bus";
30 operating-points-v2 = <&bus_gscl_opp_table>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dexynos5800.dtsi1 // SPDX-License-Identifier: GPL-2.0
20 compatible = "samsung,exynos5800-clock", "syscon";
24 opp-2000000000 {
25 opp-hz = /bits/ 64 <2000000000>;
26 opp-microvolt = <1312500 1312500 1500000>;
27 clock-latency-ns = <140000>;
29 opp-1900000000 {
30 opp-hz = /bits/ 64 <1900000000>;
31 opp-microvolt = <1262500 1262500 1500000>;
32 clock-latency-ns = <140000>;
[all …]
H A Dexynos4412.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
29 fimc-lite0 = &fimc_lite_0;
30 fimc-lite1 = &fimc_lite_1;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a9";
43 clock-names = "cpu";
44 operating-points-v2 = <&cpu0_opp_table>;
45 #cooling-cells = <2>; /* min followed by max */
[all …]
H A Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
50 #address-cells = <1>;
51 #size-cells = <0>;
[all …]
H A Drv1103.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 /delete-property/ gpio2;
16 /delete-node/ &gpio2;
19 compatible = "rockchip,rv1103-codec";
23 /delete-node/ opp-1200000000;
24 /delete-node/ opp-1296000000;
25 /delete-node/ opp-1416000000;
26 /delete-node/ opp-1512000000;
27 /delete-node/ opp-1608000000;
31 assigned-clocks =
[all …]
H A Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
20 #include "exynos4-cpu-thermal.dtsi"
32 #address-cells = <1>;
33 #size-cells = <0>;
37 compatible = "arm,cortex-a9";
40 clock-names = "cpu";
41 clock-latency = <160000>;
43 operating-points = <
[all …]
H A Drk3288.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3288-cru.h>
8 #include <dt-bindings/power/rk3288-power.h>
9 #include <dt-bindings/thermal/thermal.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #include <dt-bindings/suspend/rockchip-rk3288.h>
[all …]
H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
50 #address-cells = <1>;
51 #size-cells = <0>;
55 compatible = "arm,cortex-a15";
58 clock-names = "cpu";
59 operating-points-v2 = <&cpu0_opp_table>;
60 #cooling-cells = <2>; /* min followed by max */
[all …]
H A Drk3128x.dtsi4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/clock/rk3228-cru.h>
12 #include <dt-bindings/power/rk3228-power.h>
13 #include <dt-bindings/suspend/rockchip-rk322x.h>
14 #include <dt-bindings/soc/rockchip,boot-mode.h>
15 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Drk3066a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3066a-cru.h>
10 #include <dt-bindings/power/rk3066-power.h>
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "rockchip,rk3066-smp";
32 compatible = "arm,cortex-a9";
33 next-level-cache = <&L2>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/
H A Dmeson-gx-mali450.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 gpu_opp_table: opp-table {
9 compatible = "operating-points-v2";
11 opp-125000000 {
12 opp-hz = /bits/ 64 <125000000>;
13 opp-microvolt = <950000>;
15 opp-250000000 {
16 opp-hz = /bits/ 64 <250000000>;
17 opp-microvolt = <950000>;
19 opp-285714285 {
[all …]
H A Dmeson-gxm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gxl.dtsi"
10 compatible = "amlogic,meson-gxm";
13 cpu-map {
47 compatible = "arm,cortex-a53";
49 enable-method = "psci";
50 next-level-cache = <&l2>;
52 #cooling-cells = <2>;
57 compatible = "arm,cortex-a53";
59 enable-method = "psci";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3399-early-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * NOTE: this file exists for the sake of early (pre-ES2) silicon. ES2 silicon
13 /delete-node/ opp-table0;
14 /delete-node/ opp-table1;
15 /delete-node/ opp-table2;
17 cluster0_opp: opp-table0 {
18 compatible = "operating-points-v2";
19 opp-shared;
21 opp-408000000 {
22 opp-hz = /bits/ 64 <408000000>;
[all …]
H A Drk3399-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
6 #include "rk3399-sched-energy.dtsi"
9 cluster0_opp: opp-table0 {
10 compatible = "operating-points-v2";
11 opp-shared;
13 rockchip,temp-hysteresis = <5000>;
14 rockchip,low-temp = <10000>;
15 rockchip,low-temp-min-volt = <900000>;
17 nvmem-cells = <&cpul_leakage>, <&specification_serial_number>,
[all …]
H A Drk3562j.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 compatible = "rockchip,rk3562-can";
14 clock-names = "baudclk", "apb_pclk";
16 reset-names = "can", "can-apb";
21 compatible = "rockchip,rk3562-can";
25 clock-names = "baudclk", "apb_pclk";
27 reset-names = "can", "can-apb";
33 /delete-node/ mbist-vmin;
38 /delete-node/ opp-1416000000;
39 /delete-node/ opp-1608000000;
[all …]
H A Drk3399-evb-rev3-android-lp4.dts4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "rk3399-evb-rev3.dtsi"
10 #include "rk3399-android.dtsi"
14 compatible = "rockchip,android", "rockchip,rk3399-evb-rev3-android-lp4", "rockchip,rk3399";
18 compatible = "mmio-sram";
25 rockchip,force-iram;
32 compatible ="simple-panel-dsi";
35 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
41 display-timings {
[all …]
H A Drk3399-sapphire-excavator-lp4-linux.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "rk3399-excavator-sapphire.dtsi"
7 #include "rk3399-linux.dtsi"
8 #include <dt-bindings/input/input.h>
12 compatible = "rockchip,rk3399-excavator-linux", "rockchip,rk3399";
14 vcc_lcd: vcc-lcd {
15 compatible = "regulator-fixed";
16 regulator-name = "vcc_lcd";
18 startup-delay-us = <20000>;
[all …]
H A Drk3399-op1-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
7 cluster0_opp: opp-table0 {
8 compatible = "operating-points-v2";
9 opp-shared;
12 opp-hz = /bits/ 64 <408000000>;
13 opp-microvolt = <800000>;
14 clock-latency-ns = <40000>;
17 opp-hz = /bits/ 64 <600000000>;
18 opp-microvolt = <825000>;
[all …]
H A Drk3358.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /delete-node/ opp-408000000;
11 /delete-node/ opp-600000000;
12 /delete-node/ opp-816000000;
13 /delete-node/ opp-1008000000;
14 /delete-node/ opp-1200000000;
15 /delete-node/ opp-1248000000;
16 /delete-node/ opp-1296000000;
17 /delete-node/ opp-1416000000;
18 /delete-node/ opp-1512000000;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpu/
H A Darm,mali-bifrost.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 pattern: '^gpu@[a-f0-9]+$'
18 - enum:
19 - amlogic,meson-g12a-mali
20 - realtek,rtd1619-mali
21 - rockchip,px30-mali
[all …]
H A Darm,mali-midgard.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 pattern: '^gpu@[a-f0-9]+$'
17 - items:
18 - enum:
19 - samsung,exynos5250-mali
20 - const: arm,mali-t604
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/devfreq/
H A Dexynos-bus.txt4 and sub-blocks in SoC. Most Exynos SoCs share the common architecture
9 is able to measure the current load of sub-blocks.
11 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
13 power line. The power line might be shared among one more sub-blocks.
14 So, we can divide into two type of device as the role of each sub-block.
16 - parent bus device
17 - passive bus device
26 VDD_xxx |--- A block (parent)
27 |--- B block (passive)
28 |--- C block (passive)
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dstih410.dtsi9 #include "stih410-clock.dtsi"
10 #include "stih407-family.dtsi"
11 #include "stih410-pinctrl.dtsi"
20 st,syscfg-eng = <&syscfg_opp 0x4 0x0>;
22 operating-points-v2 = <&cpu0_opp_table>;
26 operating-points-v2 = <&cpu0_opp_table>;
31 compatible = "operating-points-v2";
32 opp-shared;
34 opp@1500000000 {
35 opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/
H A Dmali-bifrost.txt1 # SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
3 # (C) COPYRIGHT 2013-2022 ARM Limited. All rights reserved.
17 # http://www.gnu.org/licenses/gpl-2.0.html.
26 - compatible : Should be mali<chip>, replacing digits with x from the back,
28 "arm,mali-midgard" or "arm,mali-bifrost"
29 - reg : Physical base address of the device and length of the register area.
30 - interrupts : Contains the three IRQ lines required by T-6xx devices
31 - interrupt-names : Contains the names of IRQ resources in the order they were
36 - clocks : One or more pairs of phandle to clock and clock specifier
40 - clock-names : Shall be set to: "clk_mali", "shadercores".
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dimx8mm-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2019-2020 NXP
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
9 #include "imx8mm-evk.dtsi"
13 compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
21 operating-points-v2 = <&ddrc_opp_table>;
23 ddrc_opp_table: opp-table {
24 compatible = "operating-points-v2";
26 opp-25M {
[all …]

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