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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mailbox/
H A Dfsl,mu.yaml4 $id: http://devicetree.org/schemas/mailbox/fsl,mu.yaml#
7 title: NXP i.MX Messaging Unit (MU)
15 and control) through the MU interface. The MU also provides the ability
18 Because the MU manages the messaging between processors, the MU uses
20 Therefore, the MU must synchronize the accesses from one side to the
21 other. The MU accomplishes synchronization using two sets of matching
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8-mu-scu
32 - fsl,imx7s-mu
[all …]
/OK3568_Linux_fs/kernel/kernel/bpf/
H A Dtnum.c64 u64 sm, sv, sigma, chi, mu; in tnum_add() local
70 mu = chi | a.mask | b.mask; in tnum_add()
71 return TNUM(sv & ~mu, mu); in tnum_add()
76 u64 dv, alpha, beta, chi, mu; in tnum_sub() local
82 mu = chi | a.mask | b.mask; in tnum_sub()
83 return TNUM(dv & ~mu, mu); in tnum_sub()
98 u64 v, mu; in tnum_or() local
101 mu = a.mask | b.mask; in tnum_or()
102 return TNUM(v, mu & ~v); in tnum_or()
107 u64 v, mu; in tnum_xor() local
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/freescale/
H A Dfsl,scu.txt9 The AP communicates with the SC using a multi-ported MU module found
10 in the LSIO subsystem. The current definition of this MU module provides
12 (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
13 with the LSIO DSC IP bus. The SC firmware will communicate with this MU
26 include "gip3" if want to support general MU interrupt.
27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
28 rx, and 1 optional MU channel for general interrupt.
29 All MU channels must be in the same MU instance.
30 Cross instances are not allowed. The MU instance can only
50 See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/
H A Dhal_sound.c41 u32 _cal_he_csi_size(u8 mu, enum channel_width bw, u8 nr, u8 nc, u8 ng, u8 cb) in _cal_he_csi_size() argument
49 "%s : mu(%d) ; bw(%d) ; nr(%d) ; nc(%d), ng(%d), cb(%d)\n", in _cal_he_csi_size()
50 __func__, mu, bw, nr, nc, ng ,cb); in _cal_he_csi_size()
71 if(mu) in _cal_he_csi_size()
76 if(mu) in _cal_he_csi_size()
89 if(mu) in _cal_he_csi_size()
230 * @mu: is this MU-MIMO STA resource request
237 bool mu, in rtw_hal_snd_query_proc_sta_res() argument
253 (void *)hal_bf_query_idle_bf_entry(hal_info, mu); in rtw_hal_snd_query_proc_sta_res()
259 hal_info, mu, bw, &hal_sta->bf_csi_buf); in rtw_hal_snd_query_proc_sta_res()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/
H A Dhal_sound.c41 u32 _cal_he_csi_size(u8 mu, enum channel_width bw, u8 nr, u8 nc, u8 ng, u8 cb) in _cal_he_csi_size() argument
49 "%s : mu(%d) ; bw(%d) ; nr(%d) ; nc(%d), ng(%d), cb(%d)\n", in _cal_he_csi_size()
50 __func__, mu, bw, nr, nc, ng ,cb); in _cal_he_csi_size()
71 if(mu) in _cal_he_csi_size()
76 if(mu) in _cal_he_csi_size()
89 if(mu) in _cal_he_csi_size()
230 * @mu: is this MU-MIMO STA resource request
237 bool mu, in rtw_hal_snd_query_proc_sta_res() argument
253 (void *)hal_bf_query_idle_bf_entry(hal_info, mu); in rtw_hal_snd_query_proc_sta_res()
259 hal_info, mu, bw, &hal_sta->bf_csi_buf); in rtw_hal_snd_query_proc_sta_res()
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/
H A Dhptiop.c142 static u64 mv_outbound_read(struct hpt_iopmu_mv __iomem *mu) in mv_outbound_read() argument
144 u32 outbound_tail = readl(&mu->outbound_tail); in mv_outbound_read()
145 u32 outbound_head = readl(&mu->outbound_head); in mv_outbound_read()
150 memcpy_fromio(&p, &mu->outbound_q[mu->outbound_tail], 8); in mv_outbound_read()
155 writel(outbound_tail, &mu->outbound_tail); in mv_outbound_read()
163 u32 inbound_head = readl(&hba->u.mv.mu->inbound_head); in mv_inbound_write()
169 memcpy_toio(&hba->u.mv.mu->inbound_q[inbound_head], &p, 8); in mv_inbound_write()
170 writel(head, &hba->u.mv.mu->inbound_head); in mv_inbound_write()
213 msg = readl(&hba->u.mv.mu->outbound_msg); in iop_intr_mv()
222 while ((tag = mv_outbound_read(hba->u.mv.mu))) in iop_intr_mv()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/
H A Dbcmwifi_monitor.c60 * mu ppdu - mapping of ru type value from phy rxstatus to rtap data format
74 * mu ppdu - doppler:1, mapping of ltf and midamble periodicity values from plcp to rtap data format
89 * mu ppdu - doppler:0, mapping of ltf value from plcp to rtap data format
285 sts->data3 |= HE_PACK_RTAP_FROM_PLCP(plcp, MU, BSS_COLOR); in wlc_he_dl_ofdma_fill_rtap_data()
287 /* beam change (doesn't apply to mu ppdu) */ in wlc_he_dl_ofdma_fill_rtap_data()
292 sts->data3 |= HE_PACK_RTAP_FROM_PLCP(plcp, MU, DL_UL); in wlc_he_dl_ofdma_fill_rtap_data()
308 sts->data3 |= HE_PACK_RTAP_FROM_PLCP(plcp, MU, LDPC); in wlc_he_dl_ofdma_fill_rtap_data()
312 sts->data3 |= HE_PACK_RTAP_FROM_PLCP(plcp, MU, STBC); in wlc_he_dl_ofdma_fill_rtap_data()
316 sts->data4 |= HE_PACK_RTAP_FROM_PLCP(plcp, MU, SR); in wlc_he_dl_ofdma_fill_rtap_data()
329 sts->data6 |= HE_PACK_RTAP_FROM_PLCP(plcp, MU, DOPPLER); in wlc_he_dl_ofdma_fill_rtap_data()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dimx8qxp.dtsi547 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
555 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
562 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
570 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
578 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
586 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/phydm/txbf/
H A Dphydm_hal_txbf_api.c22 /*@Add by YuChen for 8822B MU-MIMO API*/
470 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); in phydm_mu_rsoml_reset()
482 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s\n", __func__); in phydm_mu_rsoml_init()
497 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s tx1ss=%d, tx2ss=%d, rx=%d\n", in phydm_mu_rsoml_init()
517 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] Init Not 2T2R 22CE\n"); in phydm_mu_rsoml_decision()
521 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", in phydm_mu_rsoml_decision()
538 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", in phydm_mu_rsoml_decision()
543 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
546 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
549 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML OFF\n"); in phydm_mu_rsoml_decision()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723ds/hal/phydm/txbf/
H A Dphydm_hal_txbf_api.c23 /*@Add by YuChen for 8822B MU-MIMO API*/
466 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); in phydm_mu_rsoml_reset()
478 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s\n", __func__); in phydm_mu_rsoml_init()
493 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s tx1ss=%d, tx2ss=%d, rx=%d\n", in phydm_mu_rsoml_init()
513 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] Init Not 2T2R 22CE\n"); in phydm_mu_rsoml_decision()
517 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", in phydm_mu_rsoml_decision()
534 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", in phydm_mu_rsoml_decision()
539 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
542 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
545 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML OFF\n"); in phydm_mu_rsoml_decision()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/hal/phydm/txbf/
H A Dphydm_hal_txbf_api.c22 /*@Add by YuChen for 8822B MU-MIMO API*/
465 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); in phydm_mu_rsoml_reset()
477 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s\n", __func__); in phydm_mu_rsoml_init()
492 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s tx1ss=%d, tx2ss=%d, rx=%d\n", in phydm_mu_rsoml_init()
512 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] Init Not 2T2R 22CE\n"); in phydm_mu_rsoml_decision()
516 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", in phydm_mu_rsoml_decision()
533 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", in phydm_mu_rsoml_decision()
538 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
541 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
544 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML OFF\n"); in phydm_mu_rsoml_decision()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/hal/phydm/txbf/
H A Dphydm_hal_txbf_api.c22 /*@Add by YuChen for 8822B MU-MIMO API*/
465 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); in phydm_mu_rsoml_reset()
477 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s\n", __func__); in phydm_mu_rsoml_init()
492 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s tx1ss=%d, tx2ss=%d, rx=%d\n", in phydm_mu_rsoml_init()
512 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] Init Not 2T2R 22CE\n"); in phydm_mu_rsoml_decision()
516 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", in phydm_mu_rsoml_decision()
533 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", in phydm_mu_rsoml_decision()
538 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
541 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
544 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML OFF\n"); in phydm_mu_rsoml_decision()
[all …]
H A Dhaltxbf8822b.c87 /***************SU & MU BFee Entry********************/
152 /*@MU STAs share the common setting*/ in hal_txbf_8822b_rf_mode()
287 odm_set_bb_reg(dm, R_0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*@MU Retry Limit*/
288 odm_set_bb_reg(dm, R_0x14c0, BIT(7), 0); /*@Disable Tx MU-MIMO until sounding done*/
289 odm_set_bb_reg(dm, R_0x14c0, 0x3F, 0); /* @Clear validity of MU STAs */
290 odm_write_1byte(dm, 0x167c, 0x70); /*@MU-MIMO Option as default value*/
291 odm_write_2byte(dm, 0x1680, 0); /*@MU-MIMO Control as default value*/
293 /* Set MU NDPA rate & BW source */
433 /*************MU BFer Entry Init*************/ in hal_txbf_8822b_enter()
484 /*************MU BFee Entry Init*************/ in hal_txbf_8822b_enter()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/hal/phydm/txbf/
H A Dphydm_hal_txbf_api.c22 /*@Add by YuChen for 8822B MU-MIMO API*/
469 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); in phydm_mu_rsoml_reset()
481 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s\n", __func__); in phydm_mu_rsoml_init()
496 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s tx1ss=%d, tx2ss=%d, rx=%d\n", in phydm_mu_rsoml_init()
516 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] Init Not 2T2R 22CE\n"); in phydm_mu_rsoml_decision()
520 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", in phydm_mu_rsoml_decision()
537 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", in phydm_mu_rsoml_decision()
542 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
545 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
548 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML OFF\n"); in phydm_mu_rsoml_decision()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/txbf/
H A Dphydm_hal_txbf_api.c22 /*@Add by YuChen for 8822B MU-MIMO API*/
470 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); in phydm_mu_rsoml_reset()
482 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s\n", __func__); in phydm_mu_rsoml_init()
497 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s tx1ss=%d, tx2ss=%d, rx=%d\n", in phydm_mu_rsoml_init()
517 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] Init Not 2T2R 22CE\n"); in phydm_mu_rsoml_decision()
521 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", in phydm_mu_rsoml_decision()
538 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", in phydm_mu_rsoml_decision()
543 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
546 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
549 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML OFF\n"); in phydm_mu_rsoml_decision()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/phydm/txbf/
H A Dphydm_hal_txbf_api.c22 /*@Add by YuChen for 8822B MU-MIMO API*/
469 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); in phydm_mu_rsoml_reset()
481 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s\n", __func__); in phydm_mu_rsoml_init()
496 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s tx1ss=%d, tx2ss=%d, rx=%d\n", in phydm_mu_rsoml_init()
516 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] Init Not 2T2R 22CE\n"); in phydm_mu_rsoml_decision()
520 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", in phydm_mu_rsoml_decision()
537 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", in phydm_mu_rsoml_decision()
542 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
545 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
548 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML OFF\n"); in phydm_mu_rsoml_decision()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/phydm/txbf/
H A Dphydm_hal_txbf_api.c23 /*@Add by YuChen for 8822B MU-MIMO API*/
470 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); in phydm_mu_rsoml_reset()
482 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s\n", __func__); in phydm_mu_rsoml_init()
497 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s tx1ss=%d, tx2ss=%d, rx=%d\n", in phydm_mu_rsoml_init()
517 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] Init Not 2T2R 22CE\n"); in phydm_mu_rsoml_decision()
521 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", in phydm_mu_rsoml_decision()
538 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", in phydm_mu_rsoml_decision()
543 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
546 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); in phydm_mu_rsoml_decision()
549 PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML OFF\n"); in phydm_mu_rsoml_decision()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/phydm/txbf/
H A Dhaltxbf8822b.c228 /***************SU & MU BFee Entry********************/
295 /*MU STAs share the common setting*/ in halTxbf8822B_RfMode()
428 ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT15|BIT14|BIT13|BIT12, 1); /*MU Retry Limit*/ in HalTxbf8822B_Init()
429 ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT7, 0); /*Disable Tx MU-MIMO until sounding done*/ in HalTxbf8822B_Init()
430 ODM_SetBBReg(pDM_Odm, 0x14c0 , 0x3F, 0); /* Clear validity of MU STAs */ in HalTxbf8822B_Init()
431 ODM_Write1Byte(pDM_Odm, 0x167c , 0x70); /*MU-MIMO Option as default value*/ in HalTxbf8822B_Init()
432 ODM_Write2Byte(pDM_Odm, 0x1680 , 0); /*MU-MIMO Control as default value*/ in HalTxbf8822B_Init()
434 /* Set MU NDPA rate & BW source */ in HalTxbf8822B_Init()
558 /*************MU BFer Entry Init*************/ in HalTxbf8822B_Enter()
607 /*************MU BFee Entry Init*************/ in HalTxbf8822B_Enter()
[all …]
/OK3568_Linux_fs/kernel/drivers/input/
H A Dinput-mt.c315 static int adjust_dual(int *begin, int step, int *end, int eq, int mu) in adjust_dual() argument
336 if (c == 0 || (c > mu && (!eq || mu > 0))) in adjust_dual()
339 if (s < 0 && mu <= 0) in adjust_dual()
348 static void find_reduced_matrix(int *w, int nr, int nc, int nrc, int mu) in find_reduced_matrix() argument
354 adjust_dual(w + i, nr, w + i + nrc, nr <= nc, mu); in find_reduced_matrix()
357 sum += adjust_dual(w + i, 1, w + i + nr, nc <= nr, mu); in find_reduced_matrix()
365 int mu) in input_mt_set_matrix() argument
379 *w++ = dx * dx + dy * dy - mu; in input_mt_set_matrix()
445 int mu = 2 * dmax * dmax; in input_mt_assign_slots() local
455 nrc = input_mt_set_matrix(mt, pos, num_pos, mu); in input_mt_assign_slots()
[all …]
/OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/atmel/
H A Dpmecc.c176 s32 *mu; member
361 /* Reserve space for mu, dmu and delta. */ in atmel_pmecc_create_user()
375 user->mu = (s32 *)PTR_ALIGN(user->smu + in atmel_pmecc_create_user()
379 user->dmu = user->mu + req->ecc.strength + 1; in atmel_pmecc_create_user()
491 s32 *mu = user->mu; in atmel_pmecc_get_sigma() local
513 /* Mu */ in atmel_pmecc_get_sigma()
514 mu[0] = -1; in atmel_pmecc_get_sigma()
523 delta[0] = (mu[0] * 2 - lmu[0]) >> 1; in atmel_pmecc_get_sigma()
527 /* Mu */ in atmel_pmecc_get_sigma()
528 mu[1] = 0; in atmel_pmecc_get_sigma()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/txbf/
H A Dhaltxbf8822b.c80 /***************SU & MU BFee Entry********************/
148 /*MU STAs share the common setting*/ in halTxbf8822B_RfMode()
282 ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT15|BIT14|BIT13|BIT12, 10); /*MU Retry Limit*/ in HalTxbf8822B_Init()
283 ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT7, 0); /*Disable Tx MU-MIMO until sounding done*/ in HalTxbf8822B_Init()
284 ODM_SetBBReg(pDM_Odm, 0x14c0 , 0x3F, 0); /* Clear validity of MU STAs */ in HalTxbf8822B_Init()
285 ODM_Write1Byte(pDM_Odm, 0x167c , 0x70); /*MU-MIMO Option as default value*/ in HalTxbf8822B_Init()
286 ODM_Write2Byte(pDM_Odm, 0x1680 , 0); /*MU-MIMO Control as default value*/ in HalTxbf8822B_Init()
288 /* Set MU NDPA rate & BW source */ in HalTxbf8822B_Init()
429 /*************MU BFer Entry Init*************/ in HalTxbf8822B_Enter()
482 /*************MU BFee Entry Init*************/ in HalTxbf8822B_Enter()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/phydm/txbf/
H A Dhaltxbf8822b.c88 /***************SU & MU BFee Entry********************/
153 /*@MU STAs share the common setting*/ in hal_txbf_8822b_rf_mode()
288 odm_set_bb_reg(dm, R_0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*@MU Retry Limit*/
289 odm_set_bb_reg(dm, R_0x14c0, BIT(7), 0); /*@Disable Tx MU-MIMO until sounding done*/
290 odm_set_bb_reg(dm, R_0x14c0, 0x3F, 0); /* @Clear validity of MU STAs */
291 odm_write_1byte(dm, 0x167c, 0x70); /*@MU-MIMO Option as default value*/
292 odm_write_2byte(dm, 0x1680, 0); /*@MU-MIMO Control as default value*/
294 /* Set MU NDPA rate & BW source */
433 /*************MU BFer Entry Init*************/ in hal_txbf_8822b_enter()
484 /*************MU BFee Entry Init*************/ in hal_txbf_8822b_enter()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/
H A Dhaltxbf8822b.c94 /***************SU & MU BFee Entry********************/
162 /*MU STAs share the common setting*/ in hal_txbf_8822b_rf_mode()
297 odm_set_bb_reg(p_dm, 0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*MU Retry Limit*/
298 odm_set_bb_reg(p_dm, 0x14c0, BIT(7), 0); /*Disable Tx MU-MIMO until sounding done*/
299 odm_set_bb_reg(p_dm, 0x14c0, 0x3F, 0); /* Clear validity of MU STAs */
300 odm_write_1byte(p_dm, 0x167c, 0x70); /*MU-MIMO Option as default value*/
301 odm_write_2byte(p_dm, 0x1680, 0); /*MU-MIMO Control as default value*/
303 /* Set MU NDPA rate & BW source */
444 /*************MU BFer Entry Init*************/ in hal_txbf_8822b_enter()
496 /*************MU BFee Entry Init*************/ in hal_txbf_8822b_enter()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/phydm/txbf/
H A Dhaltxbf8822b.c88 /***************SU & MU BFee Entry********************/
153 /*@MU STAs share the common setting*/ in hal_txbf_8822b_rf_mode()
288 odm_set_bb_reg(dm, R_0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*@MU Retry Limit*/
289 odm_set_bb_reg(dm, R_0x14c0, BIT(7), 0); /*@Disable Tx MU-MIMO until sounding done*/
290 odm_set_bb_reg(dm, R_0x14c0, 0x3F, 0); /* @Clear validity of MU STAs */
291 odm_write_1byte(dm, 0x167c, 0x70); /*@MU-MIMO Option as default value*/
292 odm_write_2byte(dm, 0x1680, 0); /*@MU-MIMO Control as default value*/
294 /* Set MU NDPA rate & BW source */
433 /*************MU BFer Entry Init*************/ in hal_txbf_8822b_enter()
484 /*************MU BFee Entry Init*************/ in hal_txbf_8822b_enter()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/phydm/txbf/
H A Dhaltxbf8822b.c87 /***************SU & MU BFee Entry********************/
152 /*@MU STAs share the common setting*/ in hal_txbf_8822b_rf_mode()
287 odm_set_bb_reg(dm, R_0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*@MU Retry Limit*/
288 odm_set_bb_reg(dm, R_0x14c0, BIT(7), 0); /*@Disable Tx MU-MIMO until sounding done*/
289 odm_set_bb_reg(dm, R_0x14c0, 0x3F, 0); /* @Clear validity of MU STAs */
290 odm_write_1byte(dm, 0x167c, 0x70); /*@MU-MIMO Option as default value*/
291 odm_write_2byte(dm, 0x1680, 0); /*@MU-MIMO Control as default value*/
293 /* Set MU NDPA rate & BW source */
433 /*************MU BFer Entry Init*************/ in hal_txbf_8822b_enter()
484 /*************MU BFee Entry Init*************/ in hal_txbf_8822b_enter()
[all …]

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