Searched +full:meson8 +full:- +full:sdhc (Results 1 – 7 of 7) sorted by relevance
| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | meson8m2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "meson8.dtsi" 14 compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc"; 18 /* the offset of the canvas registers has changed compared to Meson8 */ 19 /delete-node/ video-lut@20; 21 canvas: video-lut@48 { 22 compatible = "amlogic,meson8m2-canvas", "amlogic,canvas"; 28 compatible = "amlogic,meson8m2-dwmac", "snps,dwmac"; 35 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; 37 reset-names = "stmmaceth"; [all …]
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| H A D | meson8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/power/meson8-power.h> 10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 15 model = "Amlogic Meson8 SoC"; 16 compatible = "amlogic,meson8"; 19 #address-cells = <1>; [all …]
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| H A D | meson8b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 #include <dt-bindings/clock/meson8-ddr-clkc.h> 8 #include <dt-bindings/clock/meson8b-clkc.h> 9 #include <dt-bindings/gpio/meson8b-gpio.h> 10 #include <dt-bindings/power/meson8-power.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a5"; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/ |
| H A D | amlogic,meson-mx-sdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Meson SDHC controller Device Tree Bindings 10 - $ref: "mmc-controller.yaml" 13 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 16 The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC 17 card interface with 1/4/8-bit bus width. 23 - enum: [all …]
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| H A D | amlogic,meson-mx-sdio.txt | 1 * Amlogic Meson6, Meson8 and Meson8b SDIO/MMC controller 4 for MMC, SD, SDIO and SDHC types of memory cards. 13 - compatible : must be one of 14 - "amlogic,meson8-sdio" 15 - "amlogic,meson8b-sdio" 16 along with the generic "amlogic,meson-mx-sdio" 17 - reg : mmc controller base registers 18 - interrupts : mmc controller interrupt 19 - #address-cells : must be 1 20 - size-cells : must be 0 [all …]
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| /OK3568_Linux_fs/kernel/drivers/mmc/host/ |
| H A D | meson-mx-sdhc-mmc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Amlogic Meson6/Meson8/Meson8b/Meson8m2 SDHC MMC host controller driver. 10 #include <linux/dma-mapping.h> 24 #include <linux/mmc/slot-gpio.h> 26 #include "meson-mx-sdhc.h" 72 regmap_write(host->regmap, MESON_SDHC_SRST, MESON_SDHC_SRST_MAIN_CTRL | in meson_mx_sdhc_hw_reset() 78 regmap_write(host->regmap, MESON_SDHC_SRST, 0); in meson_mx_sdhc_hw_reset() 87 regmap_read(host->regmap, MESON_SDHC_STAT, &stat); in meson_mx_sdhc_clear_fifo() 92 regmap_write(host->regmap, MESON_SDHC_SRST, MESON_SDHC_SRST_RXFIFO | in meson_mx_sdhc_clear_fifo() 96 regmap_read(host->regmap, MESON_SDHC_STAT, &stat); in meson_mx_sdhc_clear_fifo() [all …]
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 85 implements a hardware byte swapper using a 32-bit datum. 114 disabled, it will steal the MMC cards away - rendering them 245 This selects the SDHCI support for CNS3xxx System-on-Chip devices. 322 This selects the SDHCI support for SiRF System-on-Chip devices. 438 tristate "Amlogic Meson SDHC Host Controller support" 443 This selects support for the SDHC Host Controller on 444 Amlogic Meson6, Meson8, Meson8b and Meson8m2 SoCs. 452 tristate "Amlogic Meson6/Meson8/Meson8b SD/MMC Host Controller support" 458 Amlogic Meson6, Meson8 and Meson8b SoCs. [all …]
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