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Searched full:lane2 (Results 1 – 22 of 22) sorted by relevance

/OK3568_Linux_fs/kernel/include/uapi/linux/
H A Datmlec.h33 l_narp_req, /* LANE2 mandates the use of this */
54 unsigned int lane_version; /* LANE2: 1 for LANEv1, 2 for LANEv2 */
61 int sizeoftlvs; /* LANE2: if != 0, tlvs follow */
71 unsigned int targetless_le_arp; /* LANE2 */
72 unsigned int no_source_le_narp; /* LANE2 */
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/linux/
H A Datmlec.h33 l_narp_req, /* LANE2 mandates the use of this */
54 unsigned int lane_version; /* LANE2: 1 for LANEv1, 2 for LANEv2 */
61 int sizeoftlvs; /* LANE2: if != 0, tlvs follow */
71 unsigned int targetless_le_arp; /* LANE2 */
72 unsigned int no_source_le_narp; /* LANE2 */
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/linux/
H A Datmlec.h33 l_narp_req, /* LANE2 mandates the use of this */
54 unsigned int lane_version; /* LANE2: 1 for LANEv1, 2 for LANEv2 */
61 int sizeoftlvs; /* LANE2: if != 0, tlvs follow */
71 unsigned int targetless_le_arp; /* LANE2 */
72 unsigned int no_source_le_narp; /* LANE2 */
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-usbdp.yaml54 have "rockchip,dp-lane-mux = <2, 3>;", assuming dp lane0 on Type-C phy lane2,
57 dp lane1 on Type-C phy lane1, dp lane2 on Type-C phy lane2, dp lane3 on Type-C
/OK3568_Linux_fs/kernel/net/atm/
H A Dlec.h36 * Operations that LANE2 capable device can do. Two first functions
140 u8 *tlvs; /* LANE2: TLVs are new */
142 int lane_version; /* LANE2 */
H A Dlec_arpc.h46 * LANE2: Each MAC address can have TLVs
55 * LANE2: Template tlv struct for accessing
H A Dlec.c71 /* LANE2 functions */
375 case l_narp_req: /* LANE2: see 7.1.35 in the lane2 spec */ in lec_atm_send()
390 if (mesg->sizeoftlvs != 0) { /* LANE2 3.1.5 */ in lec_atm_send()
391 pr_debug("LANE2 3.1.5, got tlvs, size %d\n", in lec_atm_send()
412 /* LANE2 */ in lec_atm_send()
505 * LANE2: new argument struct sk_buff *data contains
506 * the LE_ARP based TLVs introduced in the LANE2 spec
756 priv->itfnum = i; /* LANE2 addition */ in lecd_attach()
1070 * LANE2: 3.1.3, LE_RESOLVE.request
1116 * LANE2: 3.1.4, LE_ASSOCIATE.request
[all …]
H A Dmpc.c365 * We fill in the pointer above when we see a LANE2 lec initializing
366 * See LANE2 spec 3.1.5
827 if (mpc->dev) { /* check if the lec is LANE2 capable */ in atm_mpoa_mpoad_attach()
/OK3568_Linux_fs/u-boot/board/freescale/ls1046ardb/
H A DREADME19 - Lane2: SGMII.5
24 - Lane2: PCIe3 with PCIe x4 slot
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drv1106-evb-dual-cam.dtsi7 * sc4336 0x30 lane2~3(dphy2)
9 * gc2053 0x3f lane2~3(dphy2)
H A Drv1106-evb-cvr-dual-cam.dtsi7 * tp2855 0x44 lane2~3(dphy2)
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/include/
H A Dgrph_object_ctrl_defs.h244 uint8_t lane2:2; /* Mapping for lane 2 */ member
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/marvell/
H A Darmada-8040-mcbin.dtsi189 "cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-dphy-rx0.c215 /* HS RX Control of lane2 */ in rk_dphy_enable()
H A Dphy-rockchip-typec.c699 * Lane2 (tx_rx_p/m_ln_2) RX2+/RX2- (pins A11/A10)
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dzynqmp.dtsi743 lane2: lane2 { label
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-j7200-main.dtsi32 <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/
H A Dmsm8996.dtsi402 reset-names = "lane2";
/OK3568_Linux_fs/u-boot/drivers/phy/marvell/
H A Dcomphy_cp110.c36 * option has different options, for example: serdes lane2 had option
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3568.dtsi3561 physical lanes use lane2 and lane3,
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Datombios.h4112 //Bit[1:0]: Define which pin connect to DVI connector data Lane2, =0: source from GPU pin TX0, =1: …
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/
H A Datombios.h4604 //Bit[1:0]: Define which pin connect to DVI connector data Lane2, =0: source from GPU pin TX0, =1: …