| /OK3568_Linux_fs/kernel/drivers/phy/marvell/ |
| H A D | phy-mvebu-cp110-comphy.c | 128 * A lane is described by the following bitfields:
180 unsigned lane; member
188 .lane = _lane, \
198 .lane = _lane, \
207 /* lane 0 */
212 /* lane 1 */
219 /* lane 2 */
227 /* lane 3 */
234 /* lane 4 */
245 /* lane 5 */
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| H A D | phy-mvebu-a3700-comphy.c | 58 unsigned int lane; member
67 .lane = _lane, \
81 /* lane 0 */
88 /* lane 1 */
95 /* lane 2 */
110 static int mvebu_a3700_comphy_smc(unsigned long function, unsigned long lane, in mvebu_a3700_comphy_smc() argument
116 arm_smccc_smc(function, lane, mode, 0, 0, 0, 0, 0, &res); in mvebu_a3700_comphy_smc()
129 static int mvebu_a3700_comphy_get_fw_mode(int lane, int port, in mvebu_a3700_comphy_get_fw_mode() argument
140 if (mvebu_a3700_comphy_modes[i].lane == lane && in mvebu_a3700_comphy_get_fw_mode()
156 struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); in mvebu_a3700_comphy_set_mode() local
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| H A D | phy-armada38x-comphy.c | 46 struct a38x_comphy_lane lane[MAX_A38X_COMPHY]; member
58 static void a38x_set_conf(struct a38x_comphy_lane *lane, bool enable) in a38x_set_conf() argument
60 struct a38x_comphy *priv = lane->priv; in a38x_set_conf()
66 conf |= BIT(lane->port); in a38x_set_conf()
68 conf &= ~BIT(lane->port); in a38x_set_conf()
73 static void a38x_comphy_set_reg(struct a38x_comphy_lane *lane, in a38x_comphy_set_reg() argument
78 val = readl_relaxed(lane->base + offset) & ~mask; in a38x_comphy_set_reg()
79 writel(val | value, lane->base + offset); in a38x_comphy_set_reg()
82 static void a38x_comphy_set_speed(struct a38x_comphy_lane *lane, in a38x_comphy_set_speed() argument
85 a38x_comphy_set_reg(lane, COMPHY_CFG1, in a38x_comphy_set_speed()
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| /OK3568_Linux_fs/kernel/drivers/net/dsa/b53/ |
| H A D | b53_serdes.c | 37 static void b53_serdes_set_lane(struct b53_device *dev, u8 lane) in b53_serdes_set_lane() argument
39 if (dev->serdes_lane == lane) in b53_serdes_set_lane()
42 WARN_ON(lane > 1); in b53_serdes_set_lane()
45 SERDES_XGXSBLK0_BLOCKADDRESS, lane); in b53_serdes_set_lane()
46 dev->serdes_lane = lane; in b53_serdes_set_lane()
49 static void b53_serdes_write(struct b53_device *dev, u8 lane, in b53_serdes_write() argument
52 b53_serdes_set_lane(dev, lane); in b53_serdes_write()
56 static u16 b53_serdes_read(struct b53_device *dev, u8 lane, in b53_serdes_read() argument
59 b53_serdes_set_lane(dev, lane); in b53_serdes_read()
66 u8 lane = b53_serdes_map_lane(dev, port); in b53_serdes_config() local
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| /OK3568_Linux_fs/kernel/drivers/net/dsa/mv88e6xxx/ |
| H A D | serdes.c | 37 int lane, int device, int reg, u16 *val) in mv88e6390_serdes_read() argument
41 return mv88e6xxx_phy_read(chip, lane, reg_c45, val); in mv88e6390_serdes_read()
45 int lane, int device, int reg, u16 val) in mv88e6390_serdes_write() argument
49 return mv88e6xxx_phy_write(chip, lane, reg_c45, val); in mv88e6390_serdes_write()
98 int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane, in mv88e6352_serdes_power() argument
120 u8 lane, unsigned int mode, in mv88e6352_serdes_pcs_config() argument
169 u8 lane, struct phylink_link_state *state) in mv88e6352_serdes_pcs_get_state() argument
190 u8 lane) in mv88e6352_serdes_pcs_an_restart() argument
203 u8 lane, int speed, int duplex) in mv88e6352_serdes_pcs_link_up() argument
236 u8 lane = 0; in mv88e6352_serdes_get_lane() local
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| H A D | serdes.h | 81 u8 lane, unsigned int mode,
85 u8 lane, unsigned int mode,
89 u8 lane, struct phylink_link_state *state);
91 u8 lane, struct phylink_link_state *state);
93 u8 lane);
95 u8 lane);
97 u8 lane, int speed, int duplex);
99 u8 lane, int speed, int duplex);
104 int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane,
106 int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane,
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| /OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | fsl_corenet_serdes.c | 62 unsigned int lpd; /* RCW lane powerdown bit */
96 int serdes_get_lane_idx(int lane) in serdes_get_lane_idx() argument
98 return lanes[lane].idx; in serdes_get_lane_idx()
101 int serdes_get_bank_by_lane(int lane) in serdes_get_bank_by_lane() argument
103 return lanes[lane].bank; in serdes_get_bank_by_lane()
106 int serdes_lane_enabled(int lane) in serdes_lane_enabled() argument
111 int bank = lanes[lane].bank; in serdes_lane_enabled()
112 int word = lanes[lane].lpd / 32; in serdes_lane_enabled()
113 int bit = lanes[lane].lpd % 32; in serdes_lane_enabled()
125 return !(srds_lpd_b[bank] & (8 >> (lane - (6 + 4 * bank)))); in serdes_lane_enabled()
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| H A D | mpc8536_serdes.c | 97 int lane; in fsl_serdes_init() local
114 case 1: /* Lane A - SATA1, Lane E - SATA2 */ in fsl_serdes_init()
142 case 3: /* Lane A - SATA1, Lane E - disabled */ in fsl_serdes_init()
164 case 4: /* Lane A - eTSEC1 SGMII, Lane E - eTSEC3 SGMII */ in fsl_serdes_init()
192 case 6: /* Lane A - eTSEC1 SGMII, Lane E - disabled */ in fsl_serdes_init()
214 case 7: /* Lane A - disabled, Lane E - disabled */ in fsl_serdes_init()
231 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
232 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_io_sel][lane]; in fsl_serdes_init()
244 for (lane = 0; lane < SRDS2_MAX_LANES; lane++) { in fsl_serdes_init()
245 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds2_io_sel][lane]; in fsl_serdes_init()
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| /OK3568_Linux_fs/u-boot/drivers/phy/marvell/ |
| H A D | comphy_mux.c | 16 * is valid for specific lane. If the type is not valid,
17 * the function update the struct and set the type of the lane as
24 int lane, opt, valid; in comphy_mux_check_config() local
28 for (lane = 0; lane < comphy_max_lanes; in comphy_mux_check_config()
29 lane++, comphy_map_data++, mux_data++) { in comphy_mux_check_config()
43 debug("lane number %d, had invalid type %d\n", in comphy_mux_check_config()
44 lane, comphy_map_data->type); in comphy_mux_check_config()
45 debug("set lane %d as type %d\n", lane, in comphy_mux_check_config()
49 debug("lane number %d, has type %d\n", in comphy_mux_check_config()
50 lane, comphy_map_data->type); in comphy_mux_check_config()
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| H A D | comphy_core.c | 89 u32 lane; in comphy_print() local
91 for (lane = 0; lane < chip_cfg->comphy_lanes_count; in comphy_print()
92 lane++, comphy_map_data++) { in comphy_print()
94 printf("Comphy-%d: %-13s\n", lane, in comphy_print()
97 printf("Comphy-%d: %-13s %-10s\n", lane, in comphy_print()
111 int lane; in comphy_probe() local
153 lane = 0; in comphy_probe()
159 comphy_map_data[lane].speed = fdtdec_get_int( in comphy_probe()
161 comphy_map_data[lane].type = fdtdec_get_int( in comphy_probe()
163 comphy_map_data[lane].invert = fdtdec_get_int( in comphy_probe()
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| H A D | comphy_cp110.c | 20 #define SD_ADDR(base, lane) (base + 0x1000 * lane) argument
21 #define HPIPE_ADDR(base, lane) (SD_ADDR(base, lane) + 0x800) argument
22 #define COMPHY_ADDR(base, lane) (base + 0x28 * lane) argument
40 {4, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII1, 0x1}, /* Lane 0 */
42 {4, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII2, 0x1}, /* Lane 1 */
44 {6, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII0, 0x1}, /* Lane 2 */
47 {8, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_RXAUI1, 0x1}, /* Lane 3 */
49 {7, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII0, 0x2}, /* Lane 4 */
52 {6, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII2, 0x1}, /* Lane 5 */
57 {2, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_PEX0, 0x4} } }, /* Lane 0 */
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| /OK3568_Linux_fs/u-boot/board/highbank/ |
| H A D | ahci.c | 82 static void cphy_spread_spectrum_override(u8 phy, u8 lane, u32 val) in cphy_spread_spectrum_override() argument
85 tmp = combo_phy_read(phy, CPHY_RX_INPUT_STS + lane * SPHY_LANE); in cphy_spread_spectrum_override()
87 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_spread_spectrum_override()
90 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_spread_spectrum_override()
94 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_spread_spectrum_override()
97 static void cphy_tx_attenuation_override(u8 phy, u8 lane) in cphy_tx_attenuation_override() argument
103 shift = ((phy == 5) ? 4 : lane) * 4; in cphy_tx_attenuation_override()
110 tmp = combo_phy_read(phy, CPHY_TX_INPUT_STS + lane * SPHY_LANE); in cphy_tx_attenuation_override()
112 combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_tx_attenuation_override()
115 combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_tx_attenuation_override()
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| /OK3568_Linux_fs/external/rknpu2/examples/3rdparty/opencv/opencv-linux-aarch64/include/opencv2/core/cuda/ |
| H A D | warp.hpp | 63 /** \brief Returns the warp lane ID of the calling thread. */
97 unsigned int lane = laneId(); in transform() local
99 InIt1 t1 = beg1 + lane; in transform()
100 InIt2 t2 = beg2 + lane; in transform()
109 const unsigned int lane = laneId(); in reduce() local
111 if (lane < 16) in reduce()
113 T partial = ptr[lane]; in reduce()
115 ptr[lane] = partial = op(partial, ptr[lane + 16]); in reduce()
116 ptr[lane] = partial = op(partial, ptr[lane + 8]); in reduce()
117 ptr[lane] = partial = op(partial, ptr[lane + 4]); in reduce()
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| /OK3568_Linux_fs/external/rknpu2/examples/3rdparty/opencv/OpenCV-android-sdk/sdk/native/jni/include/opencv2/core/cuda/ |
| H A D | warp.hpp | 63 /** \brief Returns the warp lane ID of the calling thread. */
97 unsigned int lane = laneId(); in transform() local
99 InIt1 t1 = beg1 + lane; in transform()
100 InIt2 t2 = beg2 + lane; in transform()
109 const unsigned int lane = laneId(); in reduce() local
111 if (lane < 16) in reduce()
113 T partial = ptr[lane]; in reduce()
115 ptr[lane] = partial = op(partial, ptr[lane + 16]); in reduce()
116 ptr[lane] = partial = op(partial, ptr[lane + 8]); in reduce()
117 ptr[lane] = partial = op(partial, ptr[lane + 4]); in reduce()
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| /OK3568_Linux_fs/external/rknpu2/examples/3rdparty/opencv/opencv-linux-armhf/include/opencv2/core/cuda/ |
| H A D | warp.hpp | 63 /** \brief Returns the warp lane ID of the calling thread. */
97 unsigned int lane = laneId(); in transform() local
99 InIt1 t1 = beg1 + lane; in transform()
100 InIt2 t2 = beg2 + lane; in transform()
109 const unsigned int lane = laneId(); in reduce() local
111 if (lane < 16) in reduce()
113 T partial = ptr[lane]; in reduce()
115 ptr[lane] = partial = op(partial, ptr[lane + 16]); in reduce()
116 ptr[lane] = partial = op(partial, ptr[lane + 8]); in reduce()
117 ptr[lane] = partial = op(partial, ptr[lane + 4]); in reduce()
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| /OK3568_Linux_fs/kernel/drivers/phy/ |
| H A D | phy-xgene.c | 267 /* PHY lane CSR accessing from SDS indirectly */
519 u32 speed[MAX_LANE]; /* Index for override parameter per lane */
657 static void serdes_wr(struct xgene_phy_ctx *ctx, int lane, u32 reg, u32 data) in serdes_wr() argument
663 reg += lane * SERDES_LANE_STRIDE; in serdes_wr()
672 static void serdes_rd(struct xgene_phy_ctx *ctx, int lane, u32 reg, u32 *data) in serdes_rd() argument
677 reg += lane * SERDES_LANE_STRIDE; in serdes_rd()
683 static void serdes_clrbits(struct xgene_phy_ctx *ctx, int lane, u32 reg, in serdes_clrbits() argument
688 serdes_rd(ctx, lane, reg, &val); in serdes_clrbits()
690 serdes_wr(ctx, lane, reg, val); in serdes_clrbits()
693 static void serdes_setbits(struct xgene_phy_ctx *ctx, int lane, u32 reg, in serdes_setbits() argument
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| /OK3568_Linux_fs/kernel/drivers/phy/tegra/ |
| H A D | xusb-tegra124.c | 292 struct tegra_xusb_lane *lane; in tegra124_usb3_save_context() local
300 lane = port->base.lane; in tegra124_usb3_save_context()
302 if (lane->pad == padctl->pcie) in tegra124_usb3_save_context()
303 offset = XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL6(lane->index); in tegra124_usb3_save_context()
452 static void tegra124_usb2_lane_remove(struct tegra_xusb_lane *lane) in tegra124_usb2_lane_remove() argument
454 struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane); in tegra124_usb2_lane_remove()
466 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_usb2_phy_init() local
468 return tegra124_xusb_padctl_enable(lane->pad->padctl); in tegra124_usb2_phy_init()
473 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_usb2_phy_exit() local
475 return tegra124_xusb_padctl_disable(lane->pad->padctl); in tegra124_usb2_phy_exit()
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| H A D | xusb-tegra210.c | 822 struct tegra_xusb_lane *lane; in tegra210_usb3_set_lfps_detect() local
829 lane = port->lane; in tegra210_usb3_set_lfps_detect()
831 if (lane->pad == padctl->pcie) in tegra210_usb3_set_lfps_detect()
832 offset = XUSB_PADCTL_UPHY_MISC_PAD_PX_CTL1(lane->index); in tegra210_usb3_set_lfps_detect()
904 static void tegra210_usb2_lane_remove(struct tegra_xusb_lane *lane) in tegra210_usb2_lane_remove() argument
906 struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane); in tegra210_usb2_lane_remove()
918 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_usb2_phy_init() local
919 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra210_usb2_phy_init()
934 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra210_usb2_phy_exit() local
936 return tegra210_xusb_padctl_disable(lane->pad->padctl); in tegra210_usb2_phy_exit()
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| H A D | xusb.c | 109 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, in tegra_xusb_lane_parse_dt() argument
112 struct device *dev = &lane->pad->dev; in tegra_xusb_lane_parse_dt()
120 err = match_string(lane->soc->funcs, lane->soc->num_funcs, function); in tegra_xusb_lane_parse_dt()
122 dev_err(dev, "invalid function \"%s\" for lane \"%pOFn\"\n", in tegra_xusb_lane_parse_dt()
127 lane->function = err; in tegra_xusb_lane_parse_dt()
135 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra_xusb_lane_destroy() local
137 lane->pad->ops->remove(lane); in tegra_xusb_lane_destroy()
185 struct phy *lane; in tegra_xusb_pad_register() local
193 pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane), in tegra_xusb_pad_register()
202 struct tegra_xusb_lane *lane; in tegra_xusb_pad_register() local
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-mvebu/serdes/axp/ |
| H A D | high_speed_env_spec.h | 69 {0, 1, -1 , -1, -1, -1, -1, -1, -1}, /* Lane 0 */ \
70 {0, 1, -1 , -1, -1, -1, -1, -1, 2}, /* Lane 1 */ \
71 {0, 1, -1 , 2, -1, -1, -1, -1, 3}, /* Lane 2 */ \
72 {0, 1, -1 , -1, 2, -1, -1, 3, -1}, /* Lane 3 */ \
73 {0, 1, 2 , -1, -1, 3, -1, -1, 4}, /* Lane 4 */ \
74 {0, 1, 2 , -1, 3, -1, -1, 4, -1}, /* Lane 5 */ \
75 {0, 1, 2 , 4, -1, 3, -1, -1, -1}, /* Lane 6 */ \
76 {0, 1, -1 , 2, -1, -1, 3, -1, 4}, /* Lane 7*/ \
77 {0, 1, -1 , -1, -1, -1, -1, -1, -1}, /* Lane 8 */ \
78 {0, 1, -1 , -1, -1, -1, -1, -1, -1}, /* Lane 9 */ \
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| /OK3568_Linux_fs/u-boot/drivers/video/drm/ |
| H A D | analogix_dp.c | 98 int lane, lane_count, retval; in analogix_dp_link_start() local
105 for (lane = 0; lane < lane_count; lane++) in analogix_dp_link_start()
106 dp->link_train.cr_loop[lane] = 0; in analogix_dp_link_start()
128 for (lane = 0; lane < lane_count; lane++) in analogix_dp_link_start()
129 dp->link_train.training_lane[lane] = in analogix_dp_link_start()
144 for (lane = 0; lane < lane_count; lane++) in analogix_dp_link_start()
145 buf[lane] = DP_TRAIN_PRE_EMPH_LEVEL_0 | in analogix_dp_link_start()
154 static unsigned char analogix_dp_get_lane_status(u8 link_status[2], int lane) in analogix_dp_get_lane_status() argument
156 int shift = (lane & 1) * 4; in analogix_dp_get_lane_status()
157 u8 link_value = link_status[lane >> 1]; in analogix_dp_get_lane_status()
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/ |
| H A D | xusb-padctl-common.c | 130 const struct tegra_xusb_padctl_lane *lane, in tegra_xusb_padctl_lane_find_function() argument
140 for (i = 0; i < lane->num_funcs; i++) in tegra_xusb_padctl_lane_find_function()
141 if (lane->funcs[i] == func) in tegra_xusb_padctl_lane_find_function()
154 const struct tegra_xusb_padctl_lane *lane; in tegra_xusb_padctl_group_apply() local
158 lane = tegra_xusb_padctl_find_lane(padctl, group->pins[i]); in tegra_xusb_padctl_group_apply()
159 if (!lane) { in tegra_xusb_padctl_group_apply()
160 pr_err("no lane for pin %s", group->pins[i]); in tegra_xusb_padctl_group_apply()
164 func = tegra_xusb_padctl_lane_find_function(padctl, lane, in tegra_xusb_padctl_group_apply()
167 pr_err("function %s invalid for lane %s: %d", in tegra_xusb_padctl_group_apply()
168 group->func, lane->name, func); in tegra_xusb_padctl_group_apply()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_link_dp.c | 195 DC_LOG_HW_LINK_TRAINING("%s\n %x rate = %x\n %x lane = %x framing = %x\n %x spread = %x\n", in dpcd_set_link_settings()
205 DC_LOG_HW_LINK_TRAINING("%s\n %x rate set = %x\n %x lane = %x framing = %x\n %x spread = %x\n", in dpcd_set_link_settings()
289 uint32_t lane; in dpcd_set_lt_pattern_and_lane_settings() local
325 for (lane = 0; lane < in dpcd_set_lt_pattern_and_lane_settings()
326 (uint32_t)(lt_settings->link_settings.lane_count); lane++) { in dpcd_set_lt_pattern_and_lane_settings()
328 dpcd_lane[lane].bits.VOLTAGE_SWING_SET = in dpcd_set_lt_pattern_and_lane_settings()
329 (uint8_t)(lt_settings->lane_settings[lane].VOLTAGE_SWING); in dpcd_set_lt_pattern_and_lane_settings()
330 dpcd_lane[lane].bits.PRE_EMPHASIS_SET = in dpcd_set_lt_pattern_and_lane_settings()
331 (uint8_t)(lt_settings->lane_settings[lane].PRE_EMPHASIS); in dpcd_set_lt_pattern_and_lane_settings()
333 dpcd_lane[lane].bits.MAX_SWING_REACHED = in dpcd_set_lt_pattern_and_lane_settings()
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| /OK3568_Linux_fs/kernel/drivers/phy/xilinx/ |
| H A D | phy-zynqmp.c | 29 * Lane Registers
152 #define XPSGTR_TYPE_SATA_0 2 /* SATA controller lane 0 */
153 #define XPSGTR_TYPE_SATA_1 3 /* SATA controller lane 1 */
154 #define XPSGTR_TYPE_PCIE_0 4 /* PCIe controller lane 0 */
155 #define XPSGTR_TYPE_PCIE_1 5 /* PCIe controller lane 1 */
156 #define XPSGTR_TYPE_PCIE_2 6 /* PCIe controller lane 2 */
157 #define XPSGTR_TYPE_PCIE_3 7 /* PCIe controller lane 3 */
158 #define XPSGTR_TYPE_DP_0 8 /* Display Port controller lane 0 */
159 #define XPSGTR_TYPE_DP_1 9 /* Display Port controller lane 1 */
171 * struct xpsgtr_ssc - structure to hold SSC settings for a lane
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| /OK3568_Linux_fs/u-boot/board/freescale/p2041rdb/ |
| H A D | eth.c | 30 * that the mapping must be determined dynamically, or that the lane maps to
93 int lane = serdes_get_first_lane(SGMII_FM1_DTSEC1 + port); in board_ft_fman_fixup_port() local
95 if (lane < 0) in board_ft_fman_fixup_port()
97 slot = lane_to_slot[lane]; in board_ft_fman_fixup_port()
113 int lane = serdes_get_first_lane(XAUI_FM1); in board_ft_fman_fixup_port() local
114 if (lane >= 0) { in board_ft_fman_fixup_port()
116 sprintf(phy, "phy_xgmii_%u", lane_to_slot[lane]); in board_ft_fman_fixup_port()
129 int lane; in board_eth_init() local
164 lane = serdes_get_first_lane(SGMII_FM1_DTSEC1 + idx); in board_eth_init()
165 if (lane < 0) in board_eth_init()
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