Searched +full:ipq4019 +full:- +full:mdio (Results 1 – 9 of 9) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Qualcomm IPQ40xx MDIO Controller Device Tree Bindings10 - Robert Marko <robert.marko@sartura.hr>13 - $ref: "mdio.yaml#"17 const: qcom,ipq4019-mdio19 "#address-cells":22 "#size-cells":[all …]
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause40 struct ipq4019_mdio_data *priv = bus->priv; in ipq4019_mdio_wait_busy()43 return readl_poll_timeout(priv->membase + MDIO_CMD_REG, busy, in ipq4019_mdio_wait_busy()50 struct ipq4019_mdio_data *priv = bus->priv; in ipq4019_mdio_read()55 return -ETIMEDOUT; in ipq4019_mdio_read()63 data = readl(priv->membase + MDIO_MODE_REG); in ipq4019_mdio_read()67 writel(data, priv->membase + MDIO_MODE_REG); in ipq4019_mdio_read()70 writel((mii_id << 8) | mmd, priv->membase + MDIO_ADDR_REG); in ipq4019_mdio_read()73 writel(reg, priv->membase + MDIO_DATA_WRITE_REG); in ipq4019_mdio_read()78 data = readl(priv->membase + MDIO_MODE_REG); in ipq4019_mdio_read()[all …]
1 # SPDX-License-Identifier: GPL-2.02 # Makefile for Linux MDIO bus drivers4 obj-$(CONFIG_OF_MDIO) += of_mdio.o6 obj-$(CONFIG_MDIO_ASPEED) += mdio-aspeed.o7 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o8 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o9 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o10 obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o11 obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o12 obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o[all …]
1 # SPDX-License-Identifier: GPL-2.0-only3 # MDIO Layer Configuration7 tristate "MDIO bus device drivers"9 MDIO devices and driver infrastructure code.20 loadable module or built-in.28 OpenFirmware MDIO bus (Ethernet PHY) accessors36 tristate "Allwinner sun4i MDIO interface support"39 This driver supports the MDIO interface found in the network44 tristate "APM X-Gene SoC MDIO bus controller"47 This module provides a driver for the MDIO busses found in the[all …]
1 // SPDX-License-Identifier: GPL-2.0-only6 /dts-v1/;8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/interrupt-controller/irq.h>13 #address-cells = <1>;14 #size-cells = <1>;16 model = "Qualcomm Technologies, Inc. IPQ4019";17 compatible = "qcom,ipq4019";18 interrupt-parent = <&intc>;[all …]
1 Qualcomm Atheros IPQ4019 TLMM block7 - compatible: "qcom,ipq4019-pinctrl"8 - reg: Should be the base address and length of the TLMM block.9 - interrupts: Should be the parent IRQ of the TLMM block.10 - interrupt-controller: Marks the device node as an interrupt controller.11 - #interrupt-cells: Should be two.12 - gpio-controller: Marks the device node as a GPIO controller.13 - #gpio-cells : Should be two.16 - gpio-ranges: see ../gpio/gpio.txt20 - gpio-reserved-ranges: see ../gpio/gpio.txt[all …]
1 // SPDX-License-Identifier: GPL-2.0-only11 #include "pinctrl-msm.h"511 FUNCTION(mdio),539 PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),629 PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA,711 { .compatible = "qcom,ipq4019-pinctrl", },717 .name = "ipq4019-pinctrl",736 MODULE_DESCRIPTION("Qualcomm ipq4019 pinctrl driver");
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]
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