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Searched +full:imx6ul +full:- +full:ccm (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dimx6ul-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx6ul-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
14 const: fsl,imx6ul-ccm
20 description: CCM provides 2 interrupt requests, request 1 is to generate
24 - description: CCM interrupt request 1
25 - description: CCM interrupt request 2
27 '#clock-cells':
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/OK3568_Linux_fs/kernel/arch/arm/mach-imx/
H A Dmach-imx6ul.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
22 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr"); in imx6ul_enet_clk_init()
27 pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n"); in imx6ul_enet_clk_init()
32 if (dev && dev->interface == PHY_INTERFACE_MODE_MII) { in ksz8081_phy_fixup()
35 } else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) { in ksz8081_phy_fixup()
69 imx6_pm_ccm_init("fsl,imx6ul-ccm"); in imx6ul_init_irq()
77 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6ul_init_late()
81 "fsl,imx6ul",
86 DT_MACHINE_START(IMX6UL, "Freescale i.MX6 Ultralite (Device Tree)")
H A Dpm-imx6.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
12 #include <linux/irqchip/arm-gic.h>
14 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
22 #include <asm/proc-fns.h>
145 0x27c, 0x498, 0x4a4, 0x490, /* SDCLK0, GPR_B0DS-B1DS, GPR_ADDS */
151 .mmdc_compat = "fsl,imx6q-mmdc",
152 .src_compat = "fsl,imx6q-src",
153 .iomuxc_compat = "fsl,imx6q-iomuxc",
154 .gpc_compat = "fsl,imx6q-gpc",
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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx6ul.dtsi9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6ul-pinfunc.h"
53 #address-cells = <1>;
54 #size-cells = <0>;
57 compatible = "arm,cortex-a7";
60 clock-latency = <61036>; /* two CLK32 periods */
61 operating-points = <
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H A Dimx6ull.dtsi2 * Copyright 2015-2016 Freescale Semiconductor, Inc.
9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx6ull-pinfunc.h"
13 #include "imx6ull-pinfunc-snvs.h"
50 #address-cells = <1>;
51 #size-cells = <0>;
54 compatible = "arm,cortex-a7";
57 clock-latency = <61036>; /* two CLK32 periods */
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H A Dimx6sll.dtsi9 #include <dt-bindings/clock/imx6sll-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx6sll-pinfunc.h"
43 #address-cells = <1>;
44 #size-cells = <0>;
47 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
51 operating-points = <
58 fsl,soc-operating-points = <
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
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H A Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
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/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-imx6ul.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/clock/imx6ul-clock.h>
9 #include <linux/clk-provider.h>
106 return of_machine_is_compatible("fsl,imx6ul"); in clk_on_imx6ul()
124 clk_hw_data->num = IMX6UL_CLK_END; in imx6ul_clocks_init()
125 hws = clk_hw_data->hws; in imx6ul_clocks_init()
136 np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-anatop"); in imx6ul_clocks_init()
166 clk_set_parent(hws[IMX6UL_PLL1_BYPASS]->clk, hws[IMX6UL_CLK_PLL1]->clk); in imx6ul_clocks_init()
167 clk_set_parent(hws[IMX6UL_PLL2_BYPASS]->clk, hws[IMX6UL_CLK_PLL2]->clk); in imx6ul_clocks_init()
168 clk_set_parent(hws[IMX6UL_PLL3_BYPASS]->clk, hws[IMX6UL_CLK_PLL3]->clk); in imx6ul_clocks_init()
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