| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v10_0.c | 36 #include "gc/gc_10_1_0_offset.h"
37 #include "gc/gc_10_1_0_sh_mask.h"
176 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_4, 0xffffffff, 0x00400014),
177 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_CPF_CLK_CTRL, 0xfcff8fff, 0xf8000100),
178 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CLK_CTRL, 0xcd000000, 0x0d000100),
179 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SQ_CLK_CTRL, 0x60000ff0, 0x60000100),
180 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SQG_CLK_CTRL, 0x40000000, 0x40000100),
181 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xffff8fff, 0xffff8100),
182 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_WD_CLK_CTRL, 0xfeff8fff, 0xfeff8100),
183 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_PIPE_STEER, 0xffffffff, 0xe4e4e4e4),
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| H A D | gfx_v9_4.c | 33 #include "gc/gc_9_4_1_offset.h"
34 #include "gc/gc_9_4_1_sh_mask.h"
42 { SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_SCRATCH_CNT), 0, 1, 1 },
43 { SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_UCODE_CNT), 0, 1, 1 },
45 { SOC15_REG_ENTRY(GC, 0, mmDC_EDC_STATE_CNT), 0, 1, 1 },
46 { SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT), 0, 1, 1 },
47 { SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT), 0, 1, 1 },
49 { SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT), 0, 1, 1 },
50 { SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_TAG_CNT), 0, 1, 1 },
52 { SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_CNT), 0, 1, 1 },
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| H A D | gfxhub_v1_0.c | 26 #include "gc/gc_9_0_offset.h"
27 #include "gc/gc_9_0_sh_mask.h"
28 #include "gc/gc_9_0_default.h"
35 return (u64)RREG32_SOC15(GC, 0, mmMC_VM_FB_OFFSET) << 24; in gfxhub_v1_0_get_mc_fb_offset()
43 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v1_0_setup_vm_pt_regs()
47 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v1_0_setup_vm_pt_regs()
58 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs()
60 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs()
63 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs()
65 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs()
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| H A D | gfxhub_v2_1.c | 27 #include "gc/gc_10_3_0_offset.h"
28 #include "gc/gc_10_3_0_sh_mask.h"
29 #include "gc/gc_10_3_0_default.h"
107 u64 base = RREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE); in gfxhub_v2_1_get_fb_location()
117 return (u64)RREG32_SOC15(GC, 0, mmGCMC_VM_FB_OFFSET) << 24; in gfxhub_v2_1_get_mc_fb_offset()
125 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v2_1_setup_vm_pt_regs()
129 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v2_1_setup_vm_pt_regs()
140 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs()
142 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs()
145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs()
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| H A D | gfxhub_v2_0.c | 27 #include "gc/gc_10_1_0_offset.h"
28 #include "gc/gc_10_1_0_sh_mask.h"
29 #include "gc/gc_10_1_0_default.h"
107 u64 base = RREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE); in gfxhub_v2_0_get_fb_location()
117 return (u64)RREG32_SOC15(GC, 0, mmGCMC_VM_FB_OFFSET) << 24; in gfxhub_v2_0_get_mc_fb_offset()
125 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v2_0_setup_vm_pt_regs()
129 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v2_0_setup_vm_pt_regs()
140 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs()
142 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_0_init_gart_aperture_regs()
145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs()
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| H A D | gfx_v9_0.c | 37 #include "gc/gc_9_0_offset.h"
38 #include "gc/gc_9_0_sh_mask.h"
514 SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xf00fffff, 0x00000400),
515 SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x80000000, 0x80000000),
516 SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_GPU_ID, 0x0000000f, 0x00000000),
517 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_3, 0x00000003, 0x82400024),
518 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),
519 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000),
520 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSH_MEM_CONFIG, 0x00001000, 0x00001000),
521 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_CU_0, 0x0007ffff, 0x00000800),
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| /OK3568_Linux_fs/kernel/drivers/gpio/ |
| H A D | gpio-mmio.c | 125 static unsigned long bgpio_line2mask(struct gpio_chip *gc, unsigned int line) in bgpio_line2mask() argument
127 if (gc->be_bits) in bgpio_line2mask()
128 return BIT(gc->bgpio_bits - 1 - line); in bgpio_line2mask()
132 static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio) in bgpio_get_set() argument
134 unsigned long pinmask = bgpio_line2mask(gc, gpio); in bgpio_get_set()
135 bool dir = !!(gc->bgpio_dir & pinmask); in bgpio_get_set()
138 return !!(gc->read_reg(gc->reg_set) & pinmask); in bgpio_get_set()
140 return !!(gc->read_reg(gc->reg_dat) & pinmask); in bgpio_get_set()
147 static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask, in bgpio_get_set_multiple() argument
156 set_mask = *mask & gc->bgpio_dir; in bgpio_get_set_multiple()
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| H A D | gpiolib.c | 84 static void gpiochip_free_hogs(struct gpio_chip *gc);
85 static int gpiochip_add_irqchip(struct gpio_chip *gc,
88 static void gpiochip_irqchip_remove(struct gpio_chip *gc);
89 static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
90 static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
91 static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
135 * @gc: GPIO chip
142 struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc, in gpiochip_get_desc() argument
145 struct gpio_device *gdev = gc->gpiodev; in gpiochip_get_desc()
217 struct gpio_chip *gc; in gpiod_get_direction() local
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| H A D | gpio-mpc8xxx.c | 39 struct gpio_chip gc; member
65 static int mpc8572_gpio_get(struct gpio_chip *gc, unsigned int gpio) in mpc8572_gpio_get() argument
68 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); in mpc8572_gpio_get()
71 out_mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR); in mpc8572_gpio_get()
72 val = gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) & ~out_mask; in mpc8572_gpio_get()
73 out_shadow = gc->bgpio_data & out_mask; in mpc8572_gpio_get()
78 static int mpc5121_gpio_dir_out(struct gpio_chip *gc, in mpc5121_gpio_dir_out() argument
81 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); in mpc5121_gpio_dir_out()
86 return mpc8xxx_gc->direction_output(gc, gpio, val); in mpc5121_gpio_dir_out()
89 static int mpc5125_gpio_dir_out(struct gpio_chip *gc, in mpc5125_gpio_dir_out() argument
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| H A D | gpio-reg.c | 14 struct gpio_chip gc; member
23 #define to_gpio_reg(x) container_of(x, struct gpio_reg, gc)
25 static int gpio_reg_get_direction(struct gpio_chip *gc, unsigned offset) in gpio_reg_get_direction() argument
27 struct gpio_reg *r = to_gpio_reg(gc); in gpio_reg_get_direction()
33 static int gpio_reg_direction_output(struct gpio_chip *gc, unsigned offset, in gpio_reg_direction_output() argument
36 struct gpio_reg *r = to_gpio_reg(gc); in gpio_reg_direction_output()
41 gc->set(gc, offset, value); in gpio_reg_direction_output()
45 static int gpio_reg_direction_input(struct gpio_chip *gc, unsigned offset) in gpio_reg_direction_input() argument
47 struct gpio_reg *r = to_gpio_reg(gc); in gpio_reg_direction_input()
52 static void gpio_reg_set(struct gpio_chip *gc, unsigned offset, int value) in gpio_reg_set() argument
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| H A D | gpio-max77650.c | 36 struct gpio_chip gc; member
40 static int max77650_gpio_direction_input(struct gpio_chip *gc, in max77650_gpio_direction_input() argument
43 struct max77650_gpio_chip *chip = gpiochip_get_data(gc); in max77650_gpio_direction_input()
51 static int max77650_gpio_direction_output(struct gpio_chip *gc, in max77650_gpio_direction_output() argument
54 struct max77650_gpio_chip *chip = gpiochip_get_data(gc); in max77650_gpio_direction_output()
65 static void max77650_gpio_set_value(struct gpio_chip *gc, in max77650_gpio_set_value() argument
68 struct max77650_gpio_chip *chip = gpiochip_get_data(gc); in max77650_gpio_set_value()
76 dev_err(gc->parent, "cannot set GPIO value: %d\n", rv); in max77650_gpio_set_value()
79 static int max77650_gpio_get_value(struct gpio_chip *gc, in max77650_gpio_get_value() argument
82 struct max77650_gpio_chip *chip = gpiochip_get_data(gc); in max77650_gpio_get_value()
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| H A D | gpio-mockup.c | 48 struct gpio_chip gc; member
87 static int gpio_mockup_get(struct gpio_chip *gc, unsigned int offset) in gpio_mockup_get() argument
89 struct gpio_mockup_chip *chip = gpiochip_get_data(gc); in gpio_mockup_get()
99 static int gpio_mockup_get_multiple(struct gpio_chip *gc, in gpio_mockup_get_multiple() argument
102 struct gpio_mockup_chip *chip = gpiochip_get_data(gc); in gpio_mockup_get_multiple()
106 for_each_set_bit(bit, mask, gc->ngpio) { in gpio_mockup_get_multiple()
121 static void gpio_mockup_set(struct gpio_chip *gc, in gpio_mockup_set() argument
124 struct gpio_mockup_chip *chip = gpiochip_get_data(gc); in gpio_mockup_set()
131 static void gpio_mockup_set_multiple(struct gpio_chip *gc, in gpio_mockup_set_multiple() argument
134 struct gpio_mockup_chip *chip = gpiochip_get_data(gc); in gpio_mockup_set_multiple()
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| H A D | gpio-mpc5200.c | 44 static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio) in mpc52xx_wkup_gpio_get() argument
46 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in mpc52xx_wkup_gpio_get()
58 __mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) in __mpc52xx_wkup_gpio_set() argument
60 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in __mpc52xx_wkup_gpio_set()
61 struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); in __mpc52xx_wkup_gpio_set()
73 mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) in mpc52xx_wkup_gpio_set() argument
79 __mpc52xx_wkup_gpio_set(gc, gpio, val); in mpc52xx_wkup_gpio_set()
86 static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) in mpc52xx_wkup_gpio_dir_in() argument
88 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in mpc52xx_wkup_gpio_dir_in()
89 struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); in mpc52xx_wkup_gpio_dir_in()
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| H A D | gpio-tb10x.c | 39 * @gc: gpio_chip structure associated to this GPIO controller
45 struct gpio_chip gc; member
65 spin_lock_irqsave(&gpio->gc.bgpio_lock, flags); in tb10x_set_bits()
72 spin_unlock_irqrestore(&gpio->gc.bgpio_lock, flags); in tb10x_set_bits()
130 tb10x_gpio->gc.label = in tb10x_gpio_probe()
132 if (!tb10x_gpio->gc.label) in tb10x_gpio_probe()
140 ret = bgpio_init(&tb10x_gpio->gc, dev, 4, in tb10x_gpio_probe()
151 tb10x_gpio->gc.base = -1; in tb10x_gpio_probe()
152 tb10x_gpio->gc.parent = dev; in tb10x_gpio_probe()
153 tb10x_gpio->gc.owner = THIS_MODULE; in tb10x_gpio_probe()
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| H A D | gpio-brcmstb.c | 49 struct gpio_chip gc; member
74 brcmstb_gpio_gc_to_priv(struct gpio_chip *gc) in brcmstb_gpio_gc_to_priv() argument
76 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); in brcmstb_gpio_gc_to_priv()
85 return bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) & in __brcmstb_gpio_get_active_irqs()
86 bank->gc.read_reg(reg_base + GIO_MASK(bank->id)); in __brcmstb_gpio_get_active_irqs()
95 spin_lock_irqsave(&bank->gc.bgpio_lock, flags); in brcmstb_gpio_get_active_irqs()
97 spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags); in brcmstb_gpio_get_active_irqs()
105 return hwirq - (bank->gc.base - bank->parent_priv->gpio_base); in brcmstb_gpio_hwirq_to_offset()
111 struct gpio_chip *gc = &bank->gc; in brcmstb_gpio_set_imask() local
117 spin_lock_irqsave(&gc->bgpio_lock, flags); in brcmstb_gpio_set_imask()
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| H A D | gpio-raspberrypi-exp.c | 26 struct gpio_chip gc; member
54 static int rpi_exp_gpio_get_polarity(struct gpio_chip *gc, unsigned int off) in rpi_exp_gpio_get_polarity() argument
60 gpio = gpiochip_get_data(gc); in rpi_exp_gpio_get_polarity()
67 dev_err(gc->parent, "Failed to get GPIO %u config (%d %x)\n", in rpi_exp_gpio_get_polarity()
74 static int rpi_exp_gpio_dir_in(struct gpio_chip *gc, unsigned int off) in rpi_exp_gpio_dir_in() argument
80 gpio = gpiochip_get_data(gc); in rpi_exp_gpio_dir_in()
88 ret = rpi_exp_gpio_get_polarity(gc, off); in rpi_exp_gpio_dir_in()
96 dev_err(gc->parent, "Failed to set GPIO %u to input (%d %x)\n", in rpi_exp_gpio_dir_in()
103 static int rpi_exp_gpio_dir_out(struct gpio_chip *gc, unsigned int off, int val) in rpi_exp_gpio_dir_out() argument
109 gpio = gpiochip_get_data(gc); in rpi_exp_gpio_dir_out()
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| /OK3568_Linux_fs/kernel/drivers/lightnvm/ |
| H A D | pblk-gc.c | 16 * pblk-gc.c - pblk's garbage collector
33 struct pblk_gc *gc = &pblk->gc; in pblk_gc_write() local
37 spin_lock(&gc->w_lock); in pblk_gc_write()
38 if (list_empty(&gc->w_list)) { in pblk_gc_write()
39 spin_unlock(&gc->w_lock); in pblk_gc_write()
43 list_cut_position(&w_list, &gc->w_list, gc->w_list.prev); in pblk_gc_write()
44 gc->w_entries = 0; in pblk_gc_write()
45 spin_unlock(&gc->w_lock); in pblk_gc_write()
57 static void pblk_gc_writer_kick(struct pblk_gc *gc) in pblk_gc_writer_kick() argument
59 wake_up_process(gc->gc_writer_ts); in pblk_gc_writer_kick()
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| /OK3568_Linux_fs/kernel/kernel/irq/ |
| H A D | generic-chip.c | 38 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_disable_reg() local
42 irq_gc_lock(gc); in irq_gc_mask_disable_reg()
43 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_reg()
45 irq_gc_unlock(gc); in irq_gc_mask_disable_reg()
53 * and protected by gc->lock
57 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_set_bit() local
61 irq_gc_lock(gc); in irq_gc_mask_set_bit()
63 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_set_bit()
64 irq_gc_unlock(gc); in irq_gc_mask_set_bit()
73 * and protected by gc->lock
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| /OK3568_Linux_fs/kernel/drivers/irqchip/ |
| H A D | irq-atmel-aic.c | 63 struct irq_domain_chip_generic *dgc = aic_domain->gc; in aic_handle()
64 struct irq_chip_generic *gc = dgc->gc[0]; in aic_handle() local
68 irqnr = irq_reg_readl(gc, AT91_AIC_IVR); in aic_handle()
69 irqstat = irq_reg_readl(gc, AT91_AIC_ISR); in aic_handle()
72 irq_reg_writel(gc, 0, AT91_AIC_EOICR); in aic_handle()
79 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in aic_retrigger() local
82 irq_gc_lock(gc); in aic_retrigger()
83 irq_reg_writel(gc, d->mask, AT91_AIC_ISCR); in aic_retrigger()
84 irq_gc_unlock(gc); in aic_retrigger()
91 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in aic_set_type() local
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| H A D | irq-tb10x.c | 31 static inline void ab_irqctl_writereg(struct irq_chip_generic *gc, u32 reg, in ab_irqctl_writereg() argument
34 irq_reg_writel(gc, val, reg); in ab_irqctl_writereg()
37 static inline u32 ab_irqctl_readreg(struct irq_chip_generic *gc, u32 reg) in ab_irqctl_readreg() argument
39 return irq_reg_readl(gc, reg); in ab_irqctl_readreg()
44 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); in tb10x_irq_set_type() local
49 irq_gc_lock(gc); in tb10x_irq_set_type()
51 mod = ab_irqctl_readreg(gc, AB_IRQCTL_SRC_MODE) | im; in tb10x_irq_set_type()
52 pol = ab_irqctl_readreg(gc, AB_IRQCTL_SRC_POLARITY) | im; in tb10x_irq_set_type()
70 irq_gc_unlock(gc); in tb10x_irq_set_type()
79 ab_irqctl_writereg(gc, AB_IRQCTL_SRC_MODE, mod); in tb10x_irq_set_type()
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| H A D | irq-loongson-liointc.c | 43 struct irq_chip_generic *gc; member
53 struct irq_chip_generic *gc = handler->priv->gc; in liointc_chained_handle_irq() local
58 pending = readl(gc->reg_base + LIOINTC_REG_INTC_STATUS); in liointc_chained_handle_irq()
63 (handler->parent_int_map & gc->mask_cache & in liointc_chained_handle_irq()
73 generic_handle_irq(irq_find_mapping(gc->domain, bit)); in liointc_chained_handle_irq()
80 static void liointc_set_bit(struct irq_chip_generic *gc, in liointc_set_bit() argument
85 writel(readl(gc->reg_base + offset) | mask, in liointc_set_bit()
86 gc->reg_base + offset); in liointc_set_bit()
88 writel(readl(gc->reg_base + offset) & ~mask, in liointc_set_bit()
89 gc->reg_base + offset); in liointc_set_bit()
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| H A D | irq-sunxi-nmi.c | 88 static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc, u32 off, in sunxi_sc_nmi_write() argument
91 irq_reg_writel(gc, val, off); in sunxi_sc_nmi_write()
94 static inline u32 sunxi_sc_nmi_read(struct irq_chip_generic *gc, u32 off) in sunxi_sc_nmi_read() argument
96 return irq_reg_readl(gc, off); in sunxi_sc_nmi_read()
112 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); in sunxi_sc_nmi_set_type() local
113 struct irq_chip_type *ct = gc->chip_types; in sunxi_sc_nmi_set_type()
119 irq_gc_lock(gc); in sunxi_sc_nmi_set_type()
136 irq_gc_unlock(gc); in sunxi_sc_nmi_set_type()
145 for (i = 0; i < gc->num_ct; i++, ct++) in sunxi_sc_nmi_set_type()
149 src_type_reg = sunxi_sc_nmi_read(gc, ctrl_off); in sunxi_sc_nmi_set_type()
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| /OK3568_Linux_fs/kernel/drivers/input/joystick/ |
| H A D | gamecon.c | 73 struct gc { struct
87 static struct gc *gc_base[3]; argument
133 static void gc_n64_send_command(struct gc *gc, unsigned long cmd, in gc_n64_send_command() argument
136 struct parport *port = gc->pd->port; in gc_n64_send_command()
147 static void gc_n64_send_stop_bit(struct gc *gc, unsigned char target) in gc_n64_send_stop_bit() argument
149 struct parport *port = gc->pd->port; in gc_n64_send_stop_bit()
165 static void gc_n64_read_packet(struct gc *gc, unsigned char *data) in gc_n64_read_packet() argument
175 gc_n64_send_command(gc, GC_N64_REQUEST_DATA, GC_N64_OUT); in gc_n64_read_packet()
176 gc_n64_send_stop_bit(gc, GC_N64_OUT); in gc_n64_read_packet()
191 parport_write_data(gc->pd->port, GC_N64_POWER_R); in gc_n64_read_packet()
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| /OK3568_Linux_fs/kernel/include/linux/gpio/ |
| H A D | driver.h | 91 int (*child_to_parent_hwirq)(struct gpio_chip *gc,
106 void *(*populate_parent_alloc_arg)(struct gpio_chip *gc,
118 unsigned int (*child_offset_to_irq)(struct gpio_chip *gc,
213 int (*init_hw)(struct gpio_chip *gc);
224 void (*init_valid_mask)(struct gpio_chip *gc,
375 int (*request)(struct gpio_chip *gc,
377 void (*free)(struct gpio_chip *gc,
379 int (*get_direction)(struct gpio_chip *gc,
381 int (*direction_input)(struct gpio_chip *gc,
383 int (*direction_output)(struct gpio_chip *gc,
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| /OK3568_Linux_fs/external/xserver/glamor/ |
| H A D | glamor_core.c | 169 glamor_invalidate_stipple(GCPtr gc) in glamor_invalidate_stipple() argument
171 glamor_gc_private *gc_priv = glamor_get_gc_private(gc); in glamor_invalidate_stipple()
185 GCPtr gc = closure; in glamor_stipple_damage_report() local
187 glamor_invalidate_stipple(gc); in glamor_stipple_damage_report()
193 GCPtr gc = closure; in glamor_stipple_damage_destroy() local
194 glamor_gc_private *gc_priv = glamor_get_gc_private(gc); in glamor_stipple_damage_destroy()
197 glamor_invalidate_stipple(gc); in glamor_stipple_damage_destroy()
201 glamor_track_stipple(GCPtr gc) in glamor_track_stipple() argument
203 if (gc->stipple) { in glamor_track_stipple()
204 glamor_gc_private *gc_priv = glamor_get_gc_private(gc); in glamor_track_stipple()
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