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/OK3568_Linux_fs/kernel/drivers/net/ethernet/freescale/
H A Dfec_mpc52xx.h34 u32 fec_id; /* FEC + 0x000 */
35 u32 ievent; /* FEC + 0x004 */
36 u32 imask; /* FEC + 0x008 */
38 u32 reserved0[1]; /* FEC + 0x00C */
39 u32 r_des_active; /* FEC + 0x010 */
40 u32 x_des_active; /* FEC + 0x014 */
41 u32 r_des_active_cl; /* FEC + 0x018 */
42 u32 x_des_active_cl; /* FEC + 0x01C */
43 u32 ivent_set; /* FEC + 0x020 */
44 u32 ecntrl; /* FEC + 0x024 */
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H A Dfec_mpc52xx.c47 #include <linux/fsl/bestcomm/fec.h>
51 #define DRIVER_NAME "mpc52xx-fec"
60 struct mpc52xx_fec __iomem *fec; member
105 struct mpc52xx_fec __iomem *fec = priv->fec; in mpc52xx_fec_set_paddr() local
107 out_be32(&fec->paddr1, *(u32 *)(&mac[0])); in mpc52xx_fec_set_paddr()
108 out_be32(&fec->paddr2, (*(u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE); in mpc52xx_fec_set_paddr()
172 struct mpc52xx_fec __iomem *fec = priv->fec; in mpc52xx_fec_adjust_link() local
179 rcntrl = in_be32(&fec->r_cntrl); in mpc52xx_fec_adjust_link()
180 tcntrl = in_be32(&fec->x_cntrl); in mpc52xx_fec_adjust_link()
189 out_be32(&fec->r_cntrl, rcntrl); in mpc52xx_fec_adjust_link()
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H A DKconfig23 config FEC config
24 tristate "FEC ethernet controller (of ColdFire and some i.MX CPUs)"
36 tristate "FEC MPC52xx driver"
47 bool "FEC MPC52xx MDIO bus driver"
51 The MPC5200's FEC can connect to the Ethernet either with
54 If your board uses an external PHY connected to FEC, enable this.
99 and MPC86xx family of chips, the eTSEC on LS1021A and the FEC
H A Dfec_mpc52xx_phy.c31 struct mpc52xx_fec __iomem *fec = priv->regs; in mpc52xx_fec_mdio_transfer() local
37 out_be32(&fec->ievent, FEC_IEVENT_MII); in mpc52xx_fec_mdio_transfer()
38 out_be32(&fec->mii_data, value); in mpc52xx_fec_mdio_transfer()
41 while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) in mpc52xx_fec_mdio_transfer()
48 in_be32(&fec->mii_data) & FEC_MII_DATA_DATAMSK : 0; in mpc52xx_fec_mdio_transfer()
136 { .compatible = "mpc5200b-fec-phy", },
143 .name = "mpc5200b-fec-phy",
151 /* let fec driver call it, since this has to be registered before it */
/OK3568_Linux_fs/u-boot/drivers/net/
H A Dfec_mxc.c42 * 64-byte alignment in the DMA RX FEC buffer.
99 * programming the FEC's MII data register. in fec_mdio_read()
138 * HOLDTIME + 1 is the number of clk cycles the fec is holding the in fec_mii_setspeed()
201 struct fec_priv *fec = (struct fec_priv *)dev->priv; in miiphy_restart_aneg() local
202 struct ethernet_regs *eth = fec->bus->priv; in miiphy_restart_aneg()
209 fec_mdio_write(eth, fec->phy_id, MII_DCOUNTER, 0x00FF); in miiphy_restart_aneg()
211 fec_mdio_write(eth, fec->phy_id, MII_BMCR, BMCR_RESET); in miiphy_restart_aneg()
215 fec_mdio_write(eth, fec->phy_id, MII_ADVERTISE, in miiphy_restart_aneg()
218 fec_mdio_write(eth, fec->phy_id, MII_BMCR, in miiphy_restart_aneg()
221 if (fec->mii_postcall) in miiphy_restart_aneg()
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H A Darmada100_fec.c77 printf("ARMD100 FEC: (%s) Invalid phy address: 0x%X\n", in smi_reg_read()
82 printf("ARMD100 FEC: (%s) Invalid register offset: 0x%X\n", in smi_reg_read()
89 printf("ARMD100 FEC: (%s) PHY busy timeout\n", __func__); in smi_reg_read()
98 printf("ARMD100 FEC: (%s) PHY Read timeout, val=0x%x\n", in smi_reg_read()
122 printf("ARMD100 FEC: (%s) Invalid phy address\n", __func__); in smi_reg_write()
126 printf("ARMD100 FEC: (%s) Invalid register offset\n", __func__); in smi_reg_write()
132 printf("ARMD100 FEC: (%s) PHY busy timeout\n", __func__); in smi_reg_write()
170 printf("ARMD100 FEC: (%s) DMA Stuck\n", __func__); in abortdma()
305 printf("ARMD100 FEC: (%s) table section is full\n", in add_del_hash_entry()
496 printf("ARMD100 FEC: PHY not detected at address range 0-31\n"); in armdfec_init()
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/OK3568_Linux_fs/kernel/drivers/media/platform/rockchip/ispp/
H A Dfec.c33 struct rkispp_fec_dev *fec = video_drvdata(file); in fec_buf_add() local
40 v4l2_dbg(4, rkispp_debug, &fec->v4l2_dev, in fec_buf_add()
43 v4l2_err(&fec->v4l2_dev, "invalid dmabuf fd:%d for in picture", fd); in fec_buf_add()
47 v4l2_err(&fec->v4l2_dev, in fec_buf_add()
53 mutex_lock(&fec->hw->dev_lock); in fec_buf_add()
54 list_for_each_entry(buf, &fec->list, list) { in fec_buf_add()
62 mem = g_ops->attach_dmabuf(fec->hw->dev, dbuf, dbuf->size, DMA_BIDIRECTIONAL); in fec_buf_add()
64 v4l2_err(&fec->v4l2_dev, "failed to attach dmabuf, fd:%d\n", fd); in fec_buf_add()
69 v4l2_err(&fec->v4l2_dev, "failed to map, fd:%d\n", fd); in fec_buf_add()
87 list_add_tail(&buf->list, &fec->list); in fec_buf_add()
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H A Dstream_v20.c71 vdev->fec.is_end = true; in config_fec()
87 vdev->fec.uv_offset = addr_offs; in config_fec()
135 init_completion(&vdev->monitor.fec.cmpl); in config_fec()
136 schedule_work(&vdev->monitor.fec.work); in config_fec()
150 struct list_head *list = &vdev->fec.list_rd; in fec_free_buf()
153 if (vdev->fec.cur_rd) in fec_free_buf()
154 vdev->fec.cur_rd = NULL; in fec_free_buf()
198 struct list_head *list = &vdev->fec.list_rd; in fec_work_event()
213 spin_lock_irqsave(&vdev->fec.buf_lock, lock_flags); in fec_work_event()
214 /* event from fec frame end */ in fec_work_event()
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H A Dversion.h17 * 2. support fec function
24 * 1. fix reg write err for fec
28 * 2. safe to enable shp/fec output
53 * 3. use fec share buffer to reduce buffer size
61 * 6. tnr/nr/fec sync to start
62 * 7. fec read yuyv format
75 * 1. fec extend to independent video
92 * 2. check scl stop if fec enable
96 * 6. optimize the frame rate of fec en
H A Dstream_v10.c25 * |->TNR->DDR->NR->SHARP->DDR->FEC->|->SCL0----->DDR
64 t = vdev->fec.dbg.timestamp; in rkispp_frame_done_early()
65 seq = vdev->fec.dbg.id; in rkispp_frame_done_early()
552 vdev->fec.uv_offset = addr_offs; in config_nr_shp()
608 struct list_head *list = &vdev->fec.list_rd; in fec_free_buf()
610 if (vdev->fec.cur_rd) in fec_free_buf()
611 vdev->fec.cur_rd = NULL; in fec_free_buf()
624 vdev->fec.is_end = true; in config_fec()
661 init_completion(&vdev->monitor.fec.cmpl); in config_fec()
662 schedule_work(&vdev->monitor.fec.work); in config_fec()
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/OK3568_Linux_fs/kernel/Documentation/misc-devices/
H A Dxilinx_sdfec.rst4 Xilinx SD-FEC Driver
10 This driver supports SD-FEC Integrated Block for Zynq |Ultrascale+ (TM)| RFSoCs.
15 For a full description of SD-FEC core features, see the `SD-FEC Product Guide (PG256) <https://www.…
24 Missing features, known issues, and limitations of the SD-FEC driver are as
28 - Reset of the SD-FEC Integrated Block is not controlled by this driver
32 …indings/misc/xlnx,sd-fec.txt <https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devic…
38 The driver works with the SD-FEC core in two modes of operation:
50 - Activate the SD-FEC core
51 - Monitor the SD-FEC core for errors
52 - Retrieve the status and configuration of the SD-FEC core
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/OK3568_Linux_fs/kernel/drivers/md/
H A Ddm-verity-fec.c8 #include "dm-verity-fec.h"
11 #define DM_MSG_PREFIX "verity-fec"
18 return v->fec && v->fec->dev; in verity_fec_is_enabled()
37 mod = do_div(offset, v->fec->rsn); in fec_interleave()
38 return offset + mod * (v->fec->rounds << v->data_dev_block_bits); in fec_interleave()
45 u8 *data, u8 *fec, int neras) in fec_decode_rs8() argument
50 for (i = 0; i < v->fec->roots; i++) in fec_decode_rs8()
51 par[i] = fec[i]; in fec_decode_rs8()
53 return decode_rs8(fio->rs, data, par, v->fec->rsn, NULL, neras, in fec_decode_rs8()
67 position = (index + rsb) * v->fec->roots; in fec_read_parity()
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/freescale/fs_enet/
H A Dmii-fec.c42 #include "fec.h"
44 /* Make MII read/write commands for the FEC.
54 struct fec_info* fec = bus->priv; in fs_enet_fec_mii_read() local
55 struct fec __iomem *fecp = fec->fecp; in fs_enet_fec_mii_read()
77 struct fec_info* fec = bus->priv; in fs_enet_fec_mii_write() local
78 struct fec __iomem *fecp = fec->fecp; in fs_enet_fec_mii_write()
104 struct fec_info *fec; in fs_enet_mdio_probe() local
117 fec = kzalloc(sizeof(struct fec_info), GFP_KERNEL); in fs_enet_mdio_probe()
118 if (!fec) in fs_enet_mdio_probe()
121 new_bus->priv = fec; in fs_enet_mdio_probe()
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H A Dmac-fec.c43 #include "fec.h"
74 * Delay to wait for FEC reset command to complete (in us)
78 static int whack_reset(struct fec __iomem *fecp) in whack_reset()
100 fep->fec.fecp = of_iomap(ofdev->dev.of_node, 0); in do_pd_setup()
101 if (!fep->fec.fecp) in do_pd_setup()
119 fep->fec.hthi = 0; in setup_data()
120 fep->fec.htlo = 0; in setup_data()
164 struct fec __iomem *fecp = fep->fec.fecp; in set_promiscuous_mode()
173 fep->fec.hthi = 0; in set_multicast_start()
174 fep->fec.htlo = 0; in set_multicast_start()
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/OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/common/gen_mesh/
H A DRkGenMeshVersion.h24 * - FEC & LDCH: Keep the max FOV in the horizontal(X direction)
25 * - FEC: 1) Add "correctX" and "correctY" flag:
63 * - FEC&LDCH: change to use rho-cotTheta(or rho-tanTheta) in polynomial fitting,
70 …* - FEC&LDCH: due to a bug in polynomial fitting, last version will returns error when the I/O re…
72 - FEC: the fixed-point number is changed from 7 to 8
76 …* - FEC&LDCH: adjust some code to facilitate branch prediction logic and reduce unnecessary memor…
80 * - FEC&LDCH: fix some small bugs
84 * - FEC: change mesh border from (srcW-3, srcH-3) to (srcW-1, srcH-1)
88 …* - FEC: consider the case when the width and height of the output image are different from the i…
94 …* - FEC: add an option: saveMaxFovX--flag of retaining maximum FOV in X direction(horizontal dire…
[all …]
/OK3568_Linux_fs/kernel/include/uapi/misc/
H A Dxilinx_sdfec.h3 * Xilinx SD-FEC
193 * struct xsdfec_status - Status of SD-FEC core.
194 * @state: State of the SD-FEC core
195 * @activity: Describes if the SD-FEC instance is Active
213 * struct xsdfec_config - Configuration of SD-FEC core.
214 * @code: The codes being used by the SD-FEC instance
252 * struct xsdfec_ldpc_param_table_sizes - Used to store sizes of SD-FEC table
274 * ioctl to start SD-FEC core
284 * ioctl to stop the SD-FEC core
292 * ioctl that returns status of SD-FEC core
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/OK3568_Linux_fs/u-boot/board/freescale/mx6qarm2/
H A Dmx6qarm2.c180 miiphy_write("FEC", phy, MII_MMD_ACCESS_CTRL_REG, 0x7); in fecmxc_mii_postcall()
181 miiphy_write("FEC", phy, MII_MMD_ACCESS_ADDR_DATA_REG, 0x8016); in fecmxc_mii_postcall()
182 miiphy_write("FEC", phy, MII_MMD_ACCESS_CTRL_REG, 0x4007); in fecmxc_mii_postcall()
183 miiphy_read("FEC", phy, MII_MMD_ACCESS_ADDR_DATA_REG, &val); in fecmxc_mii_postcall()
186 miiphy_write("FEC", phy, MII_MMD_ACCESS_ADDR_DATA_REG, val); in fecmxc_mii_postcall()
189 miiphy_write("FEC", phy, MII_DBG_PORT_REG, 0x5); in fecmxc_mii_postcall()
190 miiphy_read("FEC", phy, MII_DBG_PORT2_REG, &val); in fecmxc_mii_postcall()
192 miiphy_write("FEC", phy, MII_DBG_PORT2_REG, val); in fecmxc_mii_postcall()
194 miiphy_write("FEC", phy, MII_BMCR, 0xa100); in fecmxc_mii_postcall()
207 dev = eth_get_dev_by_name("FEC"); in board_eth_init()
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/OK3568_Linux_fs/u-boot/board/bluegiga/apx4devkit/
H A Dapx4devkit.c73 miiphy_write("FEC", 0, MII_PHY_CTRL2, 0x8180); in fecmxc_mii_postcall()
85 printf("FEC MXS: Unable to init FEC clocks\n"); in board_eth_init()
91 printf("FEC MXS: Unable to init FEC\n"); in board_eth_init()
95 dev = eth_get_dev_by_name("FEC"); in board_eth_init()
97 printf("FEC MXS: Unable to get FEC device entry\n"); in board_eth_init()
103 printf("FEC MXS: Unable to register FEC MII postcall\n"); in board_eth_init()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dfsl-fec.txt1 * Freescale Fast Ethernet Controller (FEC)
4 - compatible : Should be "fsl,<soc>-fec"
6 - interrupts : Should contain fec interrupt
44 - mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
49 directory, and point the fec's "phy-handle" property to it. Then use
67 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
79 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
/OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/hwi/isp20/
H A DFecParamStream.cpp61 LOGE_CAMHW_SUBM(ISP20HW_SUBM, "no inital fec params ready"); in start()
87 LOGI_CAMHW_SUBM(ISP20HW_SUBM, "have no fec new parameter\n"); in configToDrv()
93 LOGW_CAMHW_SUBM(ISP20HW_SUBM, "Can not get ispp fec params buffer\n"); in configToDrv()
107 LOGE_CAMHW_SUBM(ISP20HW_SUBM, "fec parameter translation error\n"); in configToDrv()
109 LOGD_CAMHW_SUBM(ISP20HW_SUBM, "fec: en update 0x%x, ens 0x%x, cfg update 0x%x", in configToDrv()
113 LOGD_CAMHW_SUBM(ISP20HW_SUBM, "fec: no need update !"); in configToDrv()
125 … LOGE_CAMHW_SUBM(ISP20HW_SUBM, "RKISP1: fec: failed to ioctl VIDIOC_QBUF for index %d, %d %s.\n", in configToDrv()
/OK3568_Linux_fs/u-boot/board/freescale/mx28evk/
H A Dmx28evk.c109 /* MX28EVK uses ENET_CLK PAD to drive FEC clock */ in board_eth_init()
116 /* Reset FEC PHYs */ in board_eth_init()
123 puts("FEC MXS: Unable to init FEC0\n"); in board_eth_init()
129 puts("FEC MXS: Unable to init FEC1\n"); in board_eth_init()
135 puts("FEC MXS: Unable to get FEC0 device entry\n"); in board_eth_init()
141 puts("FEC MXS: Unable to get FEC1 device entry\n"); in board_eth_init()
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Dcx24123.c198 {0x0e, 0x03}, /* Default non-inverted, FEC 3/4 (default) */
199 {0x0f, 0xfe}, /* FEC search mask (all supported codes) */
325 static int cx24123_set_fec(struct cx24123_state *state, enum fe_code_rate fec) in cx24123_set_fec() argument
329 if (((int)fec < FEC_NONE) || (fec > FEC_AUTO)) in cx24123_set_fec()
330 fec = FEC_AUTO; in cx24123_set_fec()
333 if (fec == FEC_1_2) in cx24123_set_fec()
340 switch (fec) { in cx24123_set_fec()
342 dprintk("set FEC to 1/2\n"); in cx24123_set_fec()
347 dprintk("set FEC to 2/3\n"); in cx24123_set_fec()
352 dprintk("set FEC to 3/4\n"); in cx24123_set_fec()
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/OK3568_Linux_fs/u-boot/board/aries/m28evk/
H A Dm28evk.c136 printf("FEC MXS: Unable to init FEC0\n"); in board_eth_init()
142 printf("FEC MXS: Unable to init FEC1\n"); in board_eth_init()
148 printf("FEC MXS: Unable to get FEC0 device entry\n"); in board_eth_init()
154 printf("FEC MXS: Unable to register FEC0 mii postcall\n"); in board_eth_init()
160 printf("FEC MXS: Unable to get FEC1 device entry\n"); in board_eth_init()
166 printf("FEC MXS: Unable to register FEC1 mii postcall\n"); in board_eth_init()
/OK3568_Linux_fs/u-boot/board/freescale/m54455evb/
H A DREADME31 - drivers/net/mcffec.c ColdFire common FEC driver
36 - include/asm-m68k/fec.h FEC structure and definition
83 CONFIG_MCFFEC -- define to use common CF FEC driver
87 CONFIG_SYS_RX_ETH_BUFFER -- Set FEC Receive buffer
93 MCFFEC_TOUT_LOOP -- set FEC timeout loop
94 CONFIG_HAS_ETH1 -- define to enable second FEC in U-Boot
184 SW1 Pin5: 0 - Full ATA Bus enabled, FEC Phy1 powered down
185 1 - Upper 8 bits ATA data bus disabled, FEC PHY1 active
186 SW1 Pin6: 0 - FEC Phy0 active or 1 - FEC Phy0 powered down
377 FEC ENET Version 0.2
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/sfc/
H A Dmcdi_port_common.c311 /* The semantics of the ethtool FEC mode bitmask are not well defined,
314 * OFF overrides any other bits, and means "disable all FEC" (with the
319 * AUTO and either RS or BASER means use the specified FEC type if cable and
321 * RS or BASER alone means use the specified FEC type if cable and link partner
322 * support it and either requests it, otherwise no FEC.
323 * Both RS and BASER (whether AUTO or not) means use FEC if cable and link
512 /* Record the initial FEC configuration (or nearest approximation in efx_mcdi_phy_probe()
616 int efx_mcdi_phy_get_fecparam(struct efx_nic *efx, struct ethtool_fecparam *fec) in efx_mcdi_phy_get_fecparam() argument
637 fec->fec = mcdi_fec_caps_to_ethtool(caps, is_25g); in efx_mcdi_phy_get_fecparam()
640 fec->fec &= ~ETHTOOL_FEC_BASER; in efx_mcdi_phy_get_fecparam()
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