| /OK3568_Linux_fs/kernel/drivers/nvmem/ |
| H A D | sprd-efuse.c | 39 * The Spreadtrum AP efuse contains 2 parts: normal efuse and secure efuse,
40 * and we can only access the normal efuse in kernel. So define the normal
52 * when reading or writing data to efuse memory, the controller can save double
80 * efuse controller, so we need one hardware spinlock to synchronize between
83 static int sprd_efuse_lock(struct sprd_efuse *efuse) in sprd_efuse_lock() argument
87 mutex_lock(&efuse->mutex); in sprd_efuse_lock()
89 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sprd_efuse_lock()
92 dev_err(efuse->dev, "timeout get the hwspinlock\n"); in sprd_efuse_lock()
93 mutex_unlock(&efuse->mutex); in sprd_efuse_lock()
100 static void sprd_efuse_unlock(struct sprd_efuse *efuse) in sprd_efuse_unlock() argument
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| H A D | rockchip-efuse.c | 3 * Rockchip eFuse Driver
111 /* setup efuse timing */ in rk1808_efuse_timing_init()
130 /* clear efuse timing */ in rk1808_efuse_timing_deinit()
146 struct rockchip_efuse_chip *efuse = context; in rockchip_rk1808_efuse_read() local
152 mutex_lock(&efuse->mutex); in rockchip_rk1808_efuse_read()
154 ret = clk_bulk_prepare_enable(efuse->num_clks, efuse->clks); in rockchip_rk1808_efuse_read()
156 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk1808_efuse_read()
171 rk1808_efuse_timing_init(efuse->base); in rockchip_rk1808_efuse_read()
176 efuse->base + RK1808_AUTO_CTRL); in rockchip_rk1808_efuse_read()
178 status = readl(efuse->base + RK1808_INT_STATUS); in rockchip_rk1808_efuse_read()
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| H A D | meson-mx-efuse.c | 3 * Amlogic Meson6, Meson8 and Meson8b eFuse Driver
51 static void meson_mx_efuse_mask_bits(struct meson_mx_efuse *efuse, u32 reg, in meson_mx_efuse_mask_bits() argument
56 data = readl(efuse->base + reg); in meson_mx_efuse_mask_bits()
60 writel(data, efuse->base + reg); in meson_mx_efuse_mask_bits()
63 static int meson_mx_efuse_hw_enable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_enable() argument
67 err = clk_prepare_enable(efuse->core_clk); in meson_mx_efuse_hw_enable()
71 /* power up the efuse */ in meson_mx_efuse_hw_enable()
72 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1, in meson_mx_efuse_hw_enable()
75 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL4, in meson_mx_efuse_hw_enable()
81 static void meson_mx_efuse_hw_disable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_disable() argument
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| H A D | rk628-efuse.c | 3 * RK628 eFuse Driver
90 struct rk628_efuse_chip *efuse = container_of(regmap, struct rk628_efuse_chip, regmap); in rk628_read() local
94 dev_err(efuse->dev, "rk628-efuse:failed to read reg 0x%x\n", reg); in rk628_read()
104 struct rk628_efuse_chip *efuse = container_of(regmap, struct rk628_efuse_chip, regmap); in rk628_write() local
108 dev_err(efuse->dev, "rk628-efuse:failed to write reg 0x%x\n", reg); in rk628_write()
113 static void rk628_efuse_timing_init(struct rk628_efuse_chip *efuse) in rk628_efuse_timing_init() argument
115 u32 base = efuse->base; in rk628_efuse_timing_init()
117 rk628_write(efuse->regmap, in rk628_efuse_timing_init()
118 rk628_read(efuse->regmap, base + RK628_MOD) & (~RK628_USER_MODE), in rk628_efuse_timing_init()
121 /* setup efuse timing */ in rk628_efuse_timing_init()
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| H A D | sc27xx-efuse.c | 17 /* Efuse controller registers definition */
81 * efuse controller, so we need one hardware spinlock to synchronize between
84 static int sc27xx_efuse_lock(struct sc27xx_efuse *efuse) in sc27xx_efuse_lock() argument
88 mutex_lock(&efuse->mutex); in sc27xx_efuse_lock()
90 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sc27xx_efuse_lock()
93 dev_err(efuse->dev, "timeout to get the hwspinlock\n"); in sc27xx_efuse_lock()
94 mutex_unlock(&efuse->mutex); in sc27xx_efuse_lock()
101 static void sc27xx_efuse_unlock(struct sc27xx_efuse *efuse) in sc27xx_efuse_unlock() argument
103 hwspin_unlock_raw(efuse->hwlock); in sc27xx_efuse_unlock()
104 mutex_unlock(&efuse->mutex); in sc27xx_efuse_unlock()
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| H A D | jz4780-efuse.c | 3 * JZ4780 EFUSE Memory Support driver
10 * Currently supports JZ4780 efuse which has 8K programmable bit.
11 * Efuse is separated into seven segments as below:
72 struct jz4780_efuse *efuse = context; in jz4780_efuse_read() local
87 regmap_update_bits(efuse->map, JZ_EFUCTRL, in jz4780_efuse_read()
94 ret = regmap_read_poll_timeout(efuse->map, JZ_EFUSTATE, in jz4780_efuse_read()
99 dev_err(efuse->dev, "Time out while reading efuse data"); in jz4780_efuse_read()
103 ret = regmap_bulk_read(efuse->map, JZ_EFUDATA(0), in jz4780_efuse_read()
119 .name = "jz4780-efuse",
142 struct jz4780_efuse *efuse; in jz4780_efuse_probe() local
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| H A D | Makefile | 19 nvmem_jz4780_efuse-y := jz4780-efuse.o
26 obj-$(CONFIG_MTK_EFUSE) += nvmem_mtk-efuse.o
27 nvmem_mtk-efuse-y := mtk-efuse.o
33 nvmem_rk628_efuse-y := rk628-efuse.o
35 nvmem_rockchip_efuse-y := rockchip-efuse.o
44 obj-$(CONFIG_UNIPHIER_EFUSE) += nvmem-uniphier-efuse.o
45 nvmem-uniphier-efuse-y := uniphier-efuse.o
49 nvmem_meson_efuse-y := meson-efuse.o
51 nvmem_meson_mx_efuse-y := meson-mx-efuse.o
56 obj-$(CONFIG_SC27XX_EFUSE) += nvmem-sc27xx-efuse.o
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| H A D | Kconfig | 56 tristate "JZ4780 EFUSE Memory Support"
62 Say Y here to include support for JZ4780 efuse memory found on
100 tristate "Mediatek SoCs EFUSE support"
108 will be called efuse-mtk.
130 tristate "RK628 eFuse Support"
136 from eFuse, such as cpu-leakage.
142 tristate "Rockchip eFuse Support"
147 from eFuse, such as cpu-leakage.
207 tristate "UniPhier SoCs eFuse support"
212 from eFuse.
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/efuse/ |
| H A D | hal_efuse.c | 18 Provide efuse operations.
19 a. efuse init function
20 b. efuse shadow map read/write/update
21 c. efuse information query, map size/used bytes...
30 /* WIFI EFUSE API */
31 void efuse_shadow_read_one_byte(struct efuse_t *efuse, u16 offset, u8 *value) in efuse_shadow_read_one_byte() argument
33 *value = efuse->shadow_map[offset]; in efuse_shadow_read_one_byte()
36 void efuse_shadow_read_two_byte(struct efuse_t *efuse, u16 offset, u16 *value) in efuse_shadow_read_two_byte() argument
38 *value = efuse->shadow_map[offset]; in efuse_shadow_read_two_byte()
39 *value |= efuse->shadow_map[offset+1] << 8; in efuse_shadow_read_two_byte()
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| H A D | hal_efuse_export.h | 30 /* efuse exported API */
33 void **efuse);
35 void rtw_efuse_deinit(struct rtw_hal_com_t *hal_com, void *efuse);
38 rtw_efuse_get_info(void *efuse, enum rtw_efuse_info info_type, void *value,
41 void rtw_efuse_process(void *efuse, char *ic_name);
44 rtw_efuse_logicmap_buf_load(void *efuse, u8* buf, bool is_limit);
47 rtw_efuse_shadow_load(void *efuse, bool is_limit);
50 rtw_efuse_shadow_read(void *efuse, u8 byte_count, u16 offset, u32 *value,
54 rtw_efuse_shadow_write(void *efuse, u8 byte_count, u16 offset, u32 value,
58 rtw_efuse_shadow_update(void *efuse, bool is_limit);
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/efuse/ |
| H A D | hal_efuse.c | 18 Provide efuse operations.
19 a. efuse init function
20 b. efuse shadow map read/write/update
21 c. efuse information query, map size/used bytes...
30 /* WIFI EFUSE API */
31 void efuse_shadow_read_one_byte(struct efuse_t *efuse, u16 offset, u8 *value) in efuse_shadow_read_one_byte() argument
33 *value = efuse->shadow_map[offset]; in efuse_shadow_read_one_byte()
36 void efuse_shadow_read_two_byte(struct efuse_t *efuse, u16 offset, u16 *value) in efuse_shadow_read_two_byte() argument
38 *value = efuse->shadow_map[offset]; in efuse_shadow_read_two_byte()
39 *value |= efuse->shadow_map[offset+1] << 8; in efuse_shadow_read_two_byte()
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| H A D | hal_efuse_export.h | 30 /* efuse exported API */
33 void **efuse);
35 void rtw_efuse_deinit(struct rtw_hal_com_t *hal_com, void *efuse);
38 rtw_efuse_get_info(void *efuse, enum rtw_efuse_info info_type, void *value,
41 void rtw_efuse_process(void *efuse, char *ic_name);
44 rtw_efuse_logicmap_buf_load(void *efuse, u8* buf, bool is_limit);
47 rtw_efuse_shadow_load(void *efuse, bool is_limit);
50 rtw_efuse_shadow_read(void *efuse, u8 byte_count, u16 offset, u32 *value,
54 rtw_efuse_shadow_write(void *efuse, u8 byte_count, u16 offset, u32 value,
58 rtw_efuse_shadow_update(void *efuse, bool is_limit);
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| /OK3568_Linux_fs/u-boot/drivers/misc/ |
| H A D | rockchip-efuse.c | 2 * eFuse driver for Rockchip devices
92 u32 ctrl; /* 0x00 efuse control register */
93 u32 dout; /* 0x04 efuse data out register */
94 u32 rf; /* 0x08 efuse redundancy bit used register */
98 /* 0x14 efuse strobe finish control register */
120 /* setup efuse timing */ in rk1808_efuse_timing_init()
139 struct rockchip_efuse_regs *efuse = in rockchip_rk1808_efuse_read() local
160 &efuse->auto_ctrl); in rockchip_rk1808_efuse_read()
162 status = readl(&efuse->int_status); in rockchip_rk1808_efuse_read()
167 out_value = readl(&efuse->dout2); in rockchip_rk1808_efuse_read()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/nvmem/ |
| H A D | rockchip-efuse.yaml | 4 $id: http://devicetree.org/schemas/nvmem/rockchip-efuse.yaml#
7 title: Rockchip eFuse device tree bindings
18 - rockchip,rk1808-efuse
19 - rockchip,rk3066a-efuse
20 - rockchip,rk3128-efuse
21 - rockchip,rk3188-efuse
22 - rockchip,rk3228-efuse
23 - rockchip,rk3288-efuse
24 - rockchip,rk3288-secure-efuse
25 - rockchip,rk3328-efuse
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| H A D | mtk-efuse.txt | 1 = Mediatek MTK-EFUSE device tree bindings =
3 This binding is intended to represent MTK-EFUSE which is found in most Mediatek SOCs.
7 "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622
8 "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623
9 "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173
13 Are child nodes of MTK-EFUSE, bindings of which as described in
18 efuse: efuse@10206000 {
19 compatible = "mediatek,mt8173-efuse";
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/regulator/ |
| H A D | ti-abb-regulator.txt | 35 efuse: (see Optional properties)
36 RBB enable efuse Mask: (See Optional properties)
37 FBB enable efuse Mask: (See Optional properties)
38 Vset value efuse Mask: (See Optional properties)
47 - "efuse-address" - Contains efuse base address used to pick up ABB info.
49 "efuse-address" is required for this.
55 efuse: Mandatory if 'efuse-address' register is defined. Provides offset
56 from efuse-address to pick up ABB characteristics. Set to 0 if
57 'efuse-address' is not defined.
58 RBB enable efuse Mask: Optional if 'efuse-address' register is defined.
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/ |
| H A D | hal_api_efuse.c | 17 #include "efuse/hal_efuse_export.h"
19 /*WIFI Efuse*/
25 status = rtw_efuse_shadow_load(hal_info->efuse, is_limit); in rtw_hal_efuse_shadow_load()
35 status = rtw_efuse_shadow_update(hal_info->efuse, is_limit); in rtw_hal_efuse_shadow_update()
46 status = rtw_efuse_shadow_read(hal_info->efuse, byte_count, offset, value, in rtw_hal_efuse_shadow_read()
58 status = rtw_efuse_shadow_write(hal_info->efuse, byte_count, offset, value, in rtw_hal_efuse_shadow_write()
68 status = rtw_efuse_shadow2buf(hal_info->efuse, pbuf, buflen); in rtw_hal_efuse_shadow2buf()
78 hal_status = rtw_efuse_file_map_load(hal_info->efuse, file_path ,is_limit); in rtw_hal_efuse_file_map_load()
88 hal_status = rtw_efuse_file_mask_load(hal_info->efuse, file_path, is_limit); in rtw_hal_efuse_file_mask_load()
99 status = rtw_efuse_get_usage(hal_info->efuse, usage); in rtw_hal_efuse_get_usage()
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/ |
| H A D | hal_api_efuse.c | 17 #include "efuse/hal_efuse_export.h"
19 /*WIFI Efuse*/
25 status = rtw_efuse_shadow_load(hal_info->efuse, is_limit); in rtw_hal_efuse_shadow_load()
35 status = rtw_efuse_shadow_update(hal_info->efuse, is_limit); in rtw_hal_efuse_shadow_update()
46 status = rtw_efuse_shadow_read(hal_info->efuse, byte_count, offset, value, in rtw_hal_efuse_shadow_read()
58 status = rtw_efuse_shadow_write(hal_info->efuse, byte_count, offset, value, in rtw_hal_efuse_shadow_write()
68 status = rtw_efuse_shadow2buf(hal_info->efuse, pbuf, buflen); in rtw_hal_efuse_shadow2buf()
78 hal_status = rtw_efuse_file_map_load(hal_info->efuse, file_path ,is_limit); in rtw_hal_efuse_file_map_load()
88 hal_status = rtw_efuse_file_mask_load(hal_info->efuse, file_path, is_limit); in rtw_hal_efuse_file_mask_load()
99 status = rtw_efuse_get_usage(hal_info->efuse, usage); in rtw_hal_efuse_get_usage()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/fuse/ |
| H A D | nvidia,tegra20-fuse.txt | 4 - compatible : For Tegra20, must contain "nvidia,tegra20-efuse". For Tegra30,
5 must contain "nvidia,tegra30-efuse". For Tegra114, must contain
6 "nvidia,tegra114-efuse". For Tegra124, must contain "nvidia,tegra124-efuse".
7 For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
8 For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
9 "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
10 For Tegra234 must contain "nvidia,tegra234-efuse".
12 nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
15 nvidia,tegra30-efuse, nvidia,tegra114-efuse and nvidia,tegra124-efuse:
16 The differences between these SoCs are the size of the efuse array,
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/halmac/halmac_88xx/ |
| H A D | halmac_efuse_88xx.c | 84 * dump_efuse_map_88xx() - dump "physical" efuse map
86 * @cfg : dump efuse method
112 PLTFM_MSG_WARN("[WARN]Wait event(efuse)\n"); in dump_efuse_map_88xx()
117 PLTFM_MSG_WARN("[WARN]Not idle(efuse)\n"); in dump_efuse_map_88xx()
122 PLTFM_MSG_ERR("[ERR]Dump efuse in suspend\n"); in dump_efuse_map_88xx()
129 PLTFM_MSG_ERR("[ERR]switch efuse bank!!\n"); in dump_efuse_map_88xx()
135 PLTFM_MSG_ERR("[ERR]dump efuse!!\n"); in dump_efuse_map_88xx()
180 * dump_efuse_map_bt_88xx() - dump "BT physical" efuse map
182 * @bank : bt efuse bank
183 * @size : bt efuse map size. get from halmac_get_efuse_size API
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/mac/mac_ax/ |
| H A D | efuse.h | 149 * Efuse information offset
151 * Efuse information default value
153 * Efuse information length
284 * @addtogroup Efuse
304 * @addtogroup Efuse
324 * @addtogroup Efuse
344 * @addtogroup Efuse
365 * @addtogroup Efuse
386 * @addtogroup Efuse
408 * @addtogroup Efuse
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/mac/mac_ax/ |
| H A D | efuse.h | 149 * Efuse information offset
151 * Efuse information default value
153 * Efuse information length
284 * @addtogroup Efuse
304 * @addtogroup Efuse
324 * @addtogroup Efuse
344 * @addtogroup Efuse
365 * @addtogroup Efuse
386 * @addtogroup Efuse
408 * @addtogroup Efuse
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-mvebu/ |
| H A D | efuse.c | 12 #include <asm/arch/efuse.h>
69 static int do_prog_efuse(struct mvebu_hd_efuse *efuse, in do_prog_efuse() argument
74 val.dwords.d[0] = readl(&efuse->bits_31_0); in do_prog_efuse()
75 val.dwords.d[1] = readl(&efuse->bits_63_32); in do_prog_efuse()
76 val.lock = readl(&efuse->bit64); in do_prog_efuse()
85 writel(val.dwords.d[0], &efuse->bits_31_0); in do_prog_efuse()
87 writel(val.dwords.d[1], &efuse->bits_63_32); in do_prog_efuse()
89 writel(val.lock, &efuse->bit64); in do_prog_efuse()
97 struct mvebu_hd_efuse *efuse; in prog_efuse() local
104 efuse = get_efuse_line(nr); in prog_efuse()
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| /OK3568_Linux_fs/u-boot/board/ti/am57xx/ |
| H A D | board.c | 254 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
255 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
263 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
264 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
265 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
266 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
274 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
275 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
276 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
277 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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| /OK3568_Linux_fs/u-boot/board/ti/dra7xx/ |
| H A D | evm.c | 313 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
314 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
322 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
323 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
324 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
325 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
333 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
334 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
335 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
336 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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