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/OK3568_Linux_fs/kernel/drivers/media/pci/cx88/
H A Dcx88-dsp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "cx88-reg.h"
77 return -int_cos(x - INT_PI); in int_cos()
80 return -int_cos(INT_PI / 2 - (x % (INT_PI / 2))); in int_cos()
89 ret = 32768 - t2 + t4 - t6 + t8; in int_cos()
108 s32 s = x[i] + ((s64)coeff * s_prev / 32768) - s_prev2; in int_goertzel()
114 tmp = (s64)s_prev2 * s_prev2 + (s64)s_prev * s_prev - in int_goertzel()
143 x += (N - 192); in noise_magnitude()
147 freq_step = (freq_end - freq_start) / (samples - 1); in noise_magnitude()
157 static s32 detect_a2_a2m_eiaj(struct cx88_core *core, s16 x[], u32 N) in detect_a2_a2m_eiaj() argument
[all …]
/OK3568_Linux_fs/kernel/Documentation/arm/
H A Dmarvel.rst13 ------------
16 - 88F5082
17 - 88F5181
18 - 88F5181L
19 - 88F5182
21 … - Datasheet: http://www.embeddedarm.com/documentation/third-party/MV88F5182-datasheet.pdf
22 …- Programmer's User Guide: http://www.embeddedarm.com/documentation/third-party/MV88F5182-opensour…
23 … - User Manual: http://www.embeddedarm.com/documentation/third-party/MV88F5182-usermanual.pdf
24 - 88F5281
26 …- Datasheet: http://www.ocmodshop.com/images/reviews/networking/qnap_ts409u/marvel_88f5281_data_sh…
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/
H A Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
28 - enum:
29 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
30 - ad,ad7414
31 # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
32 - ad,adm9240
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/OK3568_Linux_fs/kernel/drivers/usb/dwc2/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 tristate "DesignWare USB2 DRD Core Support"
10 Say Y here if your system has a Dual Role Hi-Speed USB
11 controller based on the DesignWare HSOTG IP Core.
14 linked modules, the core module will be called dwc2.ko, the PCI
18 dwc2_platform.ko. For all modes(host, gadget and dual-role), there
33 The Designware USB2.0 high-speed host controller
35 driver to operate in Host-only mode.
37 comment "Gadget/Dual-role mode requires USB Gadget support to be enabled"
43 The Designware USB2.0 high-speed gadget controller
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/OK3568_Linux_fs/kernel/arch/arm/mach-vexpress/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
25 ARM core and logic (FPGA) tiles on the Versatile Express motherboard,
28 - CoreTile Express A5x2 (V2P-CA5s)
29 - CoreTile Express A9x4 (V2P-CA9)
30 - CoreTile Express A15x2 (V2P-CA15)
31 - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs
33 - Versatile Express RTSMs (Models)
42 bool "Enable A5 and A9 only errata work-arounds"
49 based on Cortex-A5 and Cortex-A9 processors. In order to
50 build a working kernel, you must also enable relevant core
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/OK3568_Linux_fs/kernel/drivers/usb/cdns3/
H A DKconfig2 tristate "Cadence USB3 Dual-Role Controller"
7 Say Y here if your system has a Cadence USB3 dual-role controller.
8 It supports: dual-role switch, Host-only, and Peripheral-only.
20 Cadence USBSS-DEV driver.
36 tristate "Cadence USB3 support on PCIe-based platforms"
40 If you're using the USBSS Core IP with a PCIe, please say
44 be dynamically linked and module will be called cdns3-pci.ko
52 platforms that contain Cadence USB3 controller core.
62 platforms that contain Cadence USB3 controller core.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/remoteproc/
H A Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
14 processor subsystems/clusters (R5FSS). The dual core cluster can be used
20 Each Dual-Core R5F sub-system is represented as a single DTS node
33 - ti,am654-r5fss
34 - ti,j721e-r5fss
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/OK3568_Linux_fs/kernel/Documentation/x86/
H A Dtopology.rst1 .. SPDX-License-Identifier: GPL-2.0
11 The architecture-agnostic topology definitions are in
12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific
17 Needless to say, code should use the generic functions - this file is *only*
35 - packages
36 - cores
37 - threads
48 Package-related topology information in the kernel:
50 - cpuinfo_x86.x86_max_cores:
54 - cpuinfo_x86.x86_max_dies:
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/OK3568_Linux_fs/buildroot/package/xenomai/
H A DConfig.in22 Real-Time Framework for Linux
29 mainly in libraries to write userspace real-time programs
30 that interact with the in-kernel Xenomai real-time core.
32 For those libraries to work, you need a Xenomai-enabled
34 - if you compile your kernel with Buildroot, you need to go
35 to Linux Kernel -> Linux Kernel Extensions to enable the
37 - if you compile your kernel outside of Buildroot, you need
38 to make sure that it is Xenomai-enabled.
52 in the Linux Kernel -> Linux Kernel Extensions menu.
106 prompt "Xenomai core"
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/OK3568_Linux_fs/u-boot/board/freescale/ls1021aqds/
H A DREADME2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/panel/
H A Dadvantech,idk-2121wr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-2121wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-2121WR 21.5" Full-HD dual-LVDS panel
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 The IDK-2121WR from Advantech is a Full-HD dual-LVDS panel.
15 A dual-LVDS interface is a dual-link connection with even pixels traveling
20 dual-lvds-odd-pixels or dual-lvds-even-pixels).
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/OK3568_Linux_fs/buildroot/board/toradex/apalis-imx6/
H A Dreadme.txt6 The Apalis iMX6 is a small form-factor Computer on Module that comes
7 in both quad core and dual core versions based on Freescale i.MX6Q and
8 Freescale i.MX6D SoCs respectively. The Cortex A9 quad core and dual
9 core CPU peaks at 1 GHz for commercial temperature variant, while the
12 https://www.toradex.com/computer-on-modules/apalis-arm-family/freescale-imx-6
17 https://www.toradex.com/products/carrier-boards/apalis-evaluation-board
20 https://www.toradex.com/products/carrier-boards/ixora-carrier-board
40 http://developer.toradex.com/knowledge-base/flashing-linux-on-imx6-modules
48 To boot from the SD card, you should change the U-Boot
49 environment. Since U-Boot is running from internal eMMC, you will need
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/OK3568_Linux_fs/kernel/drivers/usb/dwc3/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 tristate "DesignWare USB3 DRD Core Support"
9 Say Y or M here if your system has a Dual Role SuperSpeed
10 USB controller based on the DesignWare USB3 IP Core.
45 bool "Dual Role mode"
73 Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
77 tristate "PCIe-based Platforms"
81 If you're using the DesignWare Core IP with a PCIe (but not HAPS
85 tristate "Synopsys PCIe-based HAPS Platforms"
89 If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/
H A DKconfig18 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
19 including NEON and GPU, Mali-400 graphics, several DDR3 options
26 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
55 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
56 including NEON and GPU, Mali-400 graphics, several DDR3 options
66 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
67 including NEON and GPU, Mali-400 graphics, several DDR3 options
98 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
99 including NEON and GPU, Mali-400 graphics, several DDR3 options
118 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
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/OK3568_Linux_fs/u-boot/arch/arm/mach-omap2/
H A DKconfig79 The AM335x high performance SOC features a Cortex-A8
80 ARM core and more.
88 The AM335x high performance SOC features a Cortex-A8
89 ARM core and more.
107 The AM43xx high performance SOC features a Cortex-A9
108 ARM core, a quad core PRU-ICSS for industrial Ethernet
109 protocols, dual camera support, optional 3D graphics
123 The AM335x high performance SOC features a Cortex-A8
124 ARM core, a dual core PRU-ICSS for industrial Ethernet
143 authenticated) and the code. See the doc/README.ti-secure
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/OK3568_Linux_fs/u-boot/board/freescale/p1022ds/
H A DREADME2 --------
3 P1022ds is a Low End Dual core platform supporting the P1022 processor
4 of QorIQ series. P1022 is an e500 based dual core SOC.
8 -------------------------------
21 'setenv hwconfig 'audclk:12;tdm' --- error !
22 'setenv hwconfig 'audclk:11;tdm' --- error !
23 'setenv hwconfig 'audclk:10' --- error !
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/
H A Dcpu.c7 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch/imx-regs.h>
29 static u32 reset_cause = -1;
36 cause = readl(&src_regs->srsr); in get_reset_cause()
37 writel(cause, &src_regs->srsr); in get_reset_cause()
55 return "JTAG HIGH-Z"; in get_reset_cause()
109 * imx_ddr_size - return size in bytes of DRAM according MMDC config
117 unsigned ctl = readl(&mem->ctl); in imx_ddr_size()
118 unsigned misc = readl(&mem->misc); in imx_ddr_size()
141 return "7S"; /* Single-core version of the mx7 */ in get_imx_type()
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/OK3568_Linux_fs/u-boot/board/intel/
H A DKconfig4 # SPDX-License-Identifier: GPL-2.0+
17 Intel quad-core Atom Processor E3800 with dual-channel DDR3L SODIMM
41 This is the Intel Edison Compute Module. It contains a dual core Intel
43 eMMC flash on board, Wi-Fi, Bluetooth 4 and USB controllers.
49 Arduino-certified development and prototyping boards based on Intel
50 architecture. It includes an Intel Quark SoC X1000 processor, a 32-bit
51 single-core, single-thread, Intel Pentium processor instrunction set
54 standard I/O interfaces, including a full-sized mini-PCIe slot,
62 processor in a small form factor with Ethernet, micro-SD, USB 2,
64 It requires some binary blobs - see README.x86 for details.
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/
H A Dthine,thc63lvd1024.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
15 streams to parallel data outputs. The chip supports single/dual input/output
19 Single or dual operation mode, output data mapping and DDR output modes are
33 The device can operate in single-link mode or dual-link mode. In
34 single-link mode, all pixels are received on port@0, and port@1 shall not
[all …]
/OK3568_Linux_fs/buildroot/output/OK3568/target/usr/lib/modules/5.10.160/
H A Dmodules.builtin.modinfo
/OK3568_Linux_fs/u-boot/board/freescale/ls1021atwr/
H A DREADME2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsun6i-a31s-sina31s-core.dtsi2 * Copyright 2015 Chen-Yu Tsai <wens@csie.org>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
43 /dts-v1/;
44 #include "sun6i-a31s.dtsi"
45 #include "sunxi-common-regulators.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
48 #include <dt-bindings/pinctrl/sun4i-a10.h>
51 model = "Sinlinx SinA31s Core Board";
52 compatible = "sinlinx,sina31s", "allwinner,sun6i-a31s";
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun6i-a31s-sina31s-core.dtsi2 * Copyright 2015 Chen-Yu Tsai <wens@csie.org>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
43 /dts-v1/;
44 #include "sun6i-a31s.dtsi"
45 #include "sunxi-common-regulators.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
50 model = "Sinlinx SinA31s Core Board";
51 compatible = "sinlinx,sina31s", "allwinner,sun6i-a31s";
59 cpu-supply = <&reg_dcdc3>;
[all …]
/OK3568_Linux_fs/u-boot/board/theobroma-systems/puma_rk3399/
H A DREADME4 The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip
5 RK3399 in a Qseven-compatible form-factor.
7 RK3399-Q7 features:
8 * CPU: ARMv8 64bit Big-Little architecture,
9 * Big: dual-core Cortex-A72
10 * Little: quad-core Cortex-A53
12 * DRAM: 4GB-128MB dual-channel
17 * USB3.0 dual role port
22 * Companion Controller: onboard additional Cortex-M0 microcontroller
27 Here is the step-by-step to boot to U-Boot on rk3399.
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/OK3568_Linux_fs/kernel/Documentation/hwmon/
H A Dcoretemp.rst5 * All Intel Core family
11 - 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
12 - 0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
13 - 0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield),
14 - 0x26 (Tunnel Creek Atom), 0x27 (Medfield Atom),
15 - 0x36 (Cedar Trail Atom)
19 Intel 64 and IA-32 Architectures Software Developer's Manual
27 -----------
30 inside Intel CPUs. This driver can read both the per-core and per-package
31 temperature using the appropriate sensors. The per-package sensor is new;
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