Searched full:cpuctrl (Results 1 – 9 of 9) sorted by relevance
| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| H A D | cpuctrl.yaml | 4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml#
19 - const: hisilicon,cpuctrl
41 cpuctrl@a22000 {
42 compatible = "hisilicon,cpuctrl";
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| /OK3568_Linux_fs/kernel/arch/m68k/apollo/ |
| H A D | config.c | 161 cpuctrl=0xaa00; in config_apollo()
261 cpuctrl=dn_cpuctrl; in dn_heartbeat()
266 cpuctrl=dn_cpuctrl; in dn_heartbeat()
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/alteon/ |
| H A D | acenic.c | 616 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in acenic_remove_one()
624 readl(®s->CpuCtrl); /* flush */ in acenic_remove_one()
906 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in ace_init()
907 readl(®s->CpuCtrl); /* PCI write posting */ in ace_init()
1443 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl); in ace_init()
1444 readl(®s->CpuCtrl); in ace_init()
1457 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in ace_init()
1458 readl(®s->CpuCtrl); in ace_init()
2874 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) { in ace_load_firmware()
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| H A D | acenic.h | 62 u32 CpuCtrl; /* 0x140 */ member
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| /OK3568_Linux_fs/kernel/arch/m68k/include/asm/ |
| H A D | apollohw.h | 80 #define cpuctrl (*(volatile unsigned int *)(IO_BASE + cpuctrl_physaddr)) macro
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | hisi-x5hd2.dtsi | 405 cpuctrl@a22000 {
406 compatible = "hisilicon,cpuctrl";
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| /OK3568_Linux_fs/kernel/arch/arm/mach-hisi/ |
| H A D | hotplug.c | 179 np = of_find_compatible_node(NULL, NULL, "hisilicon,cpuctrl"); in hix5hd2_hotplug_init()
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| /OK3568_Linux_fs/kernel/arch/arc/boot/dts/ |
| H A D | abilis_tb10x.dtsi | 211 "cpuctrl",
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| /OK3568_Linux_fs/u-boot/board/freescale/mpc8349itx/ |
| H A D | mpc8349itx.c | 176 /* 0x1c0c0 is the VSC7385 CPU Control (CPUCTRL) Register. The power up in misc_init_f()
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