| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pci/ |
| H A D | pci-msi.txt | 16 MSIs may be distinguished in part through the use of sideband data accompanying
17 writes. In the case of PCI devices, this sideband data may be derived from the
19 controllers it can address, and the sideband data that will be associated with
23 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
30 -------------------
32 - msi-map: Maps a Requester ID to an MSI controller and associated
33 msi-specifier data. The property is an arbitrary number of tuples of
34 (rid-base,msi-controller,msi-base,length), where:
36 * rid-base is a single cell describing the first RID matched by the entry.
38 * msi-controller is a single phandle to an MSI controller
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/pinctrl/samsung/ |
| H A D | pinctrl-exynos-arm64.c | 1 // SPDX-License-Identifier: GPL-2.0+
17 #include <linux/soc/samsung/exynos-regs-pmu.h>
19 #include "pinctrl-samsung.h"
20 #include "pinctrl-exynos.h"
46 /* pin banks of exynos5433 pin-controller - ALIVE */
60 /* pin banks of exynos5433 pin-controller - AUD */
67 /* pin banks of exynos5433 pin-controller - CPIF */
73 /* pin banks of exynos5433 pin-controller - eSE */
79 /* pin banks of exynos5433 pin-controller - FINGER */
85 /* pin banks of exynos5433 pin-controller - FSYS */
[all …]
|
| H A D | pinctrl-exynos-arm.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
35 /* Retention control for S5PV210 are located at the end of clock controller */
45 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
56 const struct samsung_retention_data *data) in s5pv210_retention_init() argument
62 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
64 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
66 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()
[all …]
|
| H A D | pinctrl-samsung.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
25 * enum pincfg_type - possible pin configuration types supported.
46 * packed together into a 16-bits. The upper 8-bits represent the configuration
47 * type and the lower 8-bits hold the value of the configuration type.
57 * enum eint_type - possible external interrupt types.
63 * Samsung GPIO controller groups all the available pins into banks. The pins
77 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
108 * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
110 * @pctl_offset: starting offset of the pin-bank registers.
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/input/joystick/ |
| H A D | xpad.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * X-Box gamepad driver
5 * Copyright (c) 2002 Marko Friedemann <mfr@bmx-chemnitz.de>
16 * - information from http://euc.jp/periphs/xbox-controller.ja.html
17 * - the iForce driver drivers/char/joystick/iforce.c
18 * - the skeleton-driver drivers/usb/usb-skeleton.c
19 * - Xbox 360 information http://www.free60.org/wiki/Gamepad
20 * - Xbox One information https://github.com/quantus/xbox-one-controller-protocol
23 * - ITO Takayuki for providing essential xpad information on his website
24 * - Vojtech Pavlik - iforce driver / input subsystem
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/usb/musb/ |
| H A D | ux500_dma.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright (C) 2011 ST-Ericsson SA
18 #include <linux/dma-mapping.h>
22 #include <linux/platform_data/usb-musb-ux500.h>
32 struct ux500_dma_controller *controller; member
43 struct dma_controller controller; member
54 struct ux500_dma_channel *ux500_channel = channel->private_data; in ux500_dma_callback()
55 struct musb_hw_ep *hw_ep = ux500_channel->hw_ep; in ux500_dma_callback()
56 struct musb *musb = hw_ep->musb; in ux500_dma_callback()
59 dev_dbg(musb->controller, "DMA rx transfer done on hw_ep=%d\n", in ux500_dma_callback()
[all …]
|
| /OK3568_Linux_fs/kernel/include/linux/ |
| H A D | mailbox_controller.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 * struct mbox_chan_ops - methods to control mailbox channels
16 * @send_data: The API asks the MBOX controller driver, in atomic
18 * data is accepted for transmission, -EBUSY while rejecting
19 * if the remote hasn't yet read the last data sent. Actual
20 * transmission of data is reported by the controller via
24 * the context doesn't allow sleeping. Typically the controller
25 * will implement a busy loop waiting for the data to flush out.
26 * @startup: Called when a client requests the chan. The controller
29 * block. After this call the Controller must forward any
[all …]
|
| H A D | mhi.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
10 #include <linux/dma-direction.h>
27 * enum mhi_callback - MHI callback
29 * @MHI_CB_PENDING_DATA: New data available for client to process
51 * enum mhi_flags - Transfer flags
63 * enum mhi_device_type - Device types
64 * @MHI_DEVICE_XFER: Handles data transfer
73 * enum mhi_ch_type - Channel types
89 * struct image_info - Firmware and RDDM table
[all …]
|
| /OK3568_Linux_fs/kernel/Documentation/driver-api/usb/ |
| H A D | writing_musb_glue_layer.rst | 12 use Universal Host Controller Interface (UHCI) or Open Host Controller
15 Instead, these embedded UDC rely on the USB On-the-Go (OTG)
18 Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventra™
21 As a self-taught exercise I have written an MUSB glue layer for the
28 .. _musb-basics:
33 To get started on the topic, please read USB On-the-Go Basics (see
42 Linux USB stack is a layered architecture in which the MUSB controller
43 hardware sits at the lowest. The MUSB controller driver abstract the
44 MUSB controller hardware to the Linux USB stack::
46 ------------------------
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/usb/gadget/udc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 # (a) a peripheral controller, and
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
18 # USB Peripheral Controller Support
22 # - integrated/SOC controllers first
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/edac/ |
| H A D | mpc85xx_edac.c | 2 * Freescale MPC85xx Memory Controller kernel module
8 * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
51 struct mpc85xx_pci_pdata *pdata = pci->pvt_info; in mpc85xx_pci_check()
54 err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR); in mpc85xx_pci_check()
58 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); in mpc85xx_pci_check()
66 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ATTRIB)); in mpc85xx_pci_check()
68 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR)); in mpc85xx_pci_check()
70 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EXT_ADDR)); in mpc85xx_pci_check()
72 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DL)); in mpc85xx_pci_check()
74 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DH)); in mpc85xx_pci_check()
[all …]
|
| H A D | altera_edac.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017-2018, Intel Corporation
10 #include <linux/arm-smccc.h>
14 /* SDRAM Controller CtrlCfg Register */
17 /* SDRAM Controller CtrlCfg Register Bit Masks */
25 /* SDRAM Controller Address Width Register */
28 /* SDRAM Controller Address Widths Field Register */
38 /* SDRAM Controller Interface Data Width Register */
41 /* SDRAM Controller Interface Data Width Defines */
45 /* SDRAM Controller DRAM Status Register */
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/spi/ |
| H A D | spi-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // STMicroelectronics STM32 SPI Controller driver (master mode only)
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
179 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
191 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
199 * @rx: SPI RX data register
200 * @tx: SPI TX data register
217 * struct stm32_spi_cfg - stm32 compatible configuration data
221 * @disable: routine to disable controller
222 * @config: routine to configure controller as SPI Master
[all …]
|
| /OK3568_Linux_fs/u-boot/include/ |
| H A D | syscon.h | 5 * SPDX-License-Identifier: GPL-2.0+
14 * struct syscon_uc_info - Information stored by the syscon UCLASS_UCLASS
16 * @regmap: Register map for this controller
26 #define syscon_get_ops(dev) ((struct syscon_ops *)(dev)->driver->ops)
30 * We don't support 64-bit machines. If they are so resource-contrained that
34 * Update: 64-bit is now supported and we have an education crisis.
42 * syscon_get_regmap() - Get access to a register map
46 * @return 0 if OK, -ve on error
51 * syscon_get_regmap_by_driver_data() - Look up a controller by its ID
53 * Each system controller can be accessed by its driver data, which is
[all …]
|
| H A D | nvme.h | 5 * SPDX-License-Identifier: GPL-2.0+
14 * nvme_identify - identify controller or namespace capabilities and status
16 * This issues an identify command to the NVMe controller to return a data
17 * buffer that describes the controller or namespace capabilities and status.
19 * @dev: NVMe controller device
20 * @nsid: 0 for controller, namespace id for namespace to identify
21 * @cns: 1 for controller, 0 for namespace
23 * @return: 0 on success, -ETIMEDOUT on command execution timeout,
24 * -EIO on command execution fails
30 * nvme_get_features - retrieve the attributes of the feature specified
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/isdn/capi/ |
| H A D | kcapi.c | 40 /* ------------------------------------------------------------- */
45 u32 controller; member
48 /* ------------------------------------------------------------- */
63 /* -------- controller ref counting -------------------------------------- */
68 if (!try_module_get(ctr->owner)) in capi_ctr_get()
76 module_put(ctr->owner); in capi_ctr_put()
79 /* ------------------------------------------------------------- */
83 if (contr < 1 || contr - 1 >= CAPI_MAXCONTR) in get_capi_ctr_by_nr()
86 return capi_controller[contr - 1]; in get_capi_ctr_by_nr()
93 if (applid < 1 || applid - 1 >= CAPI_MAXAPPL) in __get_capi_appl_by_nr()
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/dma/ |
| H A D | acpi-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * ACPI helpers for DMA request / controller
5 * Based on of-dma.c
13 #include <linux/dma-mapping.h>
29 * acpi_dma_parse_resource_group - match device and parse resource group
32 * @adma: struct acpi_dma of the given DMA controller
50 if (grp->shared_info_length != sizeof(struct acpi_csrt_shared_info)) in acpi_dma_parse_resource_group()
51 return -ENODEV; in acpi_dma_parse_resource_group()
59 if (resource_type(rentry->res) == IORESOURCE_MEM) in acpi_dma_parse_resource_group()
60 mem = rentry->res->start; in acpi_dma_parse_resource_group()
[all …]
|
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
10 DMA engines can do asynchronous data transfers without
65 Enable support for Altera / Intel mSGDMA controller.
93 Support the Atmel AHB DMA controller.
100 Support the Atmel XDMA controller.
103 tristate "Analog Devices AXI-DMAC DMA support"
109 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
110 controller is often used in Analog Devices' reference designs for FPGA
129 bool "ST-Ericsson COH901318 DMA support"
133 Enable support for ST-Ericsson COH 901 318 DMA.
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/ |
| H A D | cs553x_nand.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * This is a device driver for the NAND flash controller found on
11 * mtd-id for command line partitioning is cs553x_nand_cs[0-3]
12 * where 0-3 reflects the chip select for NAND.
35 #define MSR_NANDF_DATA 0x5140001b /* NAND Flash Data Timing MSR */
55 /* Registers within the NAND flash controller BAR -- memory mapped */
57 #define MM_NAND_CTL 0x800 /* Any even address 0x800-0x80e */
58 #define MM_NAND_IO 0x801 /* Any odd address 0x801-0x80f */
66 /* Registers within the NAND flash controller BAR -- I/O mapped */
99 to_cs553x(struct nand_controller *controller) in to_cs553x() argument
[all …]
|
| /OK3568_Linux_fs/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.soc | 11 ---------
12 The LS1043A integrated multicore processor combines four ARM Cortex-A53
18 - Four 64-bit ARM Cortex-A53 CPUs
19 - 1 MB unified L2 Cache
20 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
22 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
24 - Packet parsing, classification, and distribution (FMan)
25 - Queue management for scheduling, packet sequencing, and congestion
27 - Hardware buffer management for buffer allocation and de-allocation (BMan)
28 - Cryptography acceleration (SEC)
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/mailbox/ |
| H A D | mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 Linaro Ltd.
31 spin_lock_irqsave(&chan->lock, flags); in add_to_rbuf()
34 if (chan->msg_count == MBOX_TX_QUEUE_LEN) { in add_to_rbuf()
35 spin_unlock_irqrestore(&chan->lock, flags); in add_to_rbuf()
36 return -ENOBUFS; in add_to_rbuf()
39 idx = chan->msg_free; in add_to_rbuf()
40 chan->msg_data[idx] = mssg; in add_to_rbuf()
41 chan->msg_count++; in add_to_rbuf()
43 if (idx == MBOX_TX_QUEUE_LEN - 1) in add_to_rbuf()
[all …]
|
| /OK3568_Linux_fs/kernel/drivers/reset/ |
| H A D | reset-scmi.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019-2020 ARM Ltd.
11 #include <linux/reset-controller.h>
17 * struct scmi_reset_data - reset controller information structure
18 * @rcdev: reset controller entity
19 * @ph: ARM SCMI protocol handle used for communication with system controller
27 #define to_scmi_handle(p) (to_scmi_reset_data(p)->ph)
30 * scmi_reset_assert() - assert device reset
31 * @rcdev: reset controller entity
44 return reset_ops->assert(ph, id); in scmi_reset_assert()
[all …]
|
| H A D | reset-ti-sci.c | 2 * Texas Instrument's System Control Interface (TI-SCI) reset driver
4 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
22 #include <linux/reset-controller.h>
26 * struct ti_sci_reset_control - reset control structure
27 * @dev_id: SoC-specific device identifier
29 * @lock: synchronize reset_mask read-modify-writes
38 * struct ti_sci_reset_data - reset controller information structure
39 * @rcdev: reset controller entity
40 * @dev: reset controller device pointer
41 * @sci: TI SCI handle used for communication with system controller
[all …]
|
| /OK3568_Linux_fs/u-boot/drivers/mtd/nand/raw/ |
| H A D | lpc32xx_nand_mlc.c | 2 * LPC32xx MLC NAND flash controller driver
7 * SPDX-License-Identifier: GPL-2.0+
11 * The MLC NAND flash controller provides hardware Reed-Solomon ECC
12 * covering in- and out-of-band data together. Therefore, in- and out-
13 * of-band data must be written together in order to have a valid ECC.
15 * Consequently, pages with meaningful in-band data are written with
16 * blank (all-ones) out-of-band data and a valid ECC, and any later
17 * out-of-band data write will void the ECC.
19 * Therefore, code which reads such late-written out-of-band data
32 * MLC NAND controller registers.
[all …]
|
| /OK3568_Linux_fs/u-boot/doc/driver-model/ |
| H A D | usb-info.txt | 5 ------------
9 understand how things work with USB in U-Boot when driver model is enabled.
13 -----------------------------
22 -------------------------
28 { .compatible = "nvidia,tegra20-ehci", .data = USB_CTLR_T20 },
29 { .compatible = "nvidia,tegra30-ehci", .data = USB_CTLR_T30 },
30 { .compatible = "nvidia,tegra114-ehci", .data = USB_CTLR_T114 },
48 Each has its own data value. Controllers must be in the UCLASS_USB uclass.
50 The ofdata_to_platdata() method allows the controller driver to grab any
54 most cases, since they are all EHCI-compatible. For EHCI there are also some
[all …]
|