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/OK3568_Linux_fs/kernel/drivers/clk/zte/
H A Dclk-zx296702.c46 #define CLK_UART0 (lsp1crpm_base + 0x20) macro
688 ARRAY_SIZE(uart_wclk_sel), CLK_UART0, 4, 1); in zx296702_lsp1_clocks_init()
692 zx_gate("uart0_wclk", "uart0_wclk_mux", CLK_UART0, 31); in zx296702_lsp1_clocks_init()
694 zx_gate("uart0_pclk", "lsp1_apb_pclk", CLK_UART0, 0); in zx296702_lsp1_clocks_init()
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dexynos5410.h36 #define CLK_UART0 257 macro
H A Dactions,s500-cmu.h58 #define CLK_UART0 38 macro
H A Dactions,s700-cmu.h58 #define CLK_UART0 36 macro
H A Dactions,s900-cmu.h85 #define CLK_UART0 67 macro
H A Dpistachio-clk.h39 #define CLK_UART0 48 macro
H A Dexynos5250.h92 #define CLK_UART0 289 macro
H A Ds5pv210.h161 #define CLK_UART0 143 macro
H A Dexynos5420.h66 #define CLK_UART0 257 macro
H A Dexynos4.h150 #define CLK_UART0 312 macro
H A Dexynos3250.h222 #define CLK_UART0 216 macro
H A Dsprd,sc9860-clk.h85 #define CLK_UART0 2 macro
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dexynos5410-clock.txt48 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
H A Dexynos3250-clock.txt55 clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/serial/
H A Dsprd-uart.yaml71 clocks = <&clk_ap_apb_gates 9>, <&clk_uart0>, <&ext_26m>;
/OK3568_Linux_fs/kernel/drivers/clk/actions/
H A Dowl-s700.c280 static OWL_COMP_DIV(clk_uart0, "uart0", uart_clk_mux_p,
443 &clk_uart0.common,
526 [CLK_UART0] = &clk_uart0.common.hw,
/OK3568_Linux_fs/kernel/drivers/clk/sirf/
H A Dclk-prima2.c81 &clk_uart0.hw,
H A Dclk-atlas6.c82 &clk_uart0.hw,
/OK3568_Linux_fs/kernel/drivers/clk/hisilicon/
H A Dclk-hi3519.c58 { HI3519_UART0_CLK, "clk_uart0", "24m",
H A Dcrg-hi3516cv300.c87 { HI3516CV300_UART0_CLK, "clk_uart0", "uart_mux", CLK_SET_RATE_PARENT,
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Ds5pv210.dtsi324 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/actions/
H A Ds700.dtsi119 clocks = <&cmu CLK_UART0>;
H A Ds900.dtsi125 clocks = <&cmu CLK_UART0>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi80 <&ap_clk CLK_UART0>, <&ext_26m>;
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-exynos5410.c197 GATE(CLK_UART0, "uart0", "aclk66", GATE_IP_PERIC, 0, 0, 0),

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