Searched +full:cdns +full:- +full:pcie +full:- +full:ep (Results 1 – 9 of 9) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only3 ---4 $id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Cadence PCIe EP Controller10 - Tom Joseph <tjoseph@cadence.com>13 - $ref: "cdns-pcie-ep.yaml#"14 - $ref: "pci-ep.yaml#"18 const: cdns,cdns-pcie-ep23 reg-names:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/4 ---5 $id: "http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#"6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"8 title: TI J721E PCI EP (PCIe Wrapper)11 - Kishon Vijay Abraham I <kishon@ti.com>14 - $ref: "cdns-pcie-ep.yaml#"19 - ti,j721e-pcie-ep24 reg-names:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: "http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#"5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"7 title: Cadence PCIe Device10 - Tom Joseph <tjoseph@cadence.com>13 - $ref: "cdns-pcie.yaml#"16 cdns,max-outbound-regions:24 - cdns,max-outbound-regions
1 // SPDX-License-Identifier: GPL-2.03 * Cadence PCIe platform driver.14 #include "pcie-cadence.h"19 * struct cdns_plat_pcie - private data for this PCIe platform driver20 * @pcie: Cadence PCIe controller21 * @is_rc: Set to 1 indicates the PCIe controller mode is Root Complex,25 struct cdns_pcie *pcie; member35 static u64 cdns_plat_cpu_addr_fixup(struct cdns_pcie *pcie, u64 cpu_addr) in cdns_plat_cpu_addr_fixup() argument49 struct device *dev = &pdev->dev; in cdns_plat_pcie_probe()51 struct cdns_pcie_ep *ep; in cdns_plat_pcie_probe() local[all …]
1 // SPDX-License-Identifier: GPL-2.03 // Cadence PCIe endpoint controller driver.4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>9 #include <linux/pci-epc.h>13 #include "pcie-cadence.h"22 struct cdns_pcie_ep *ep = epc_get_drvdata(epc); in cdns_pcie_ep_write_header() local23 struct cdns_pcie *pcie = &ep->pcie; in cdns_pcie_ep_write_header() local25 cdns_pcie_ep_fn_writew(pcie, fn, PCI_DEVICE_ID, hdr->deviceid); in cdns_pcie_ep_write_header()26 cdns_pcie_ep_fn_writeb(pcie, fn, PCI_REVISION_ID, hdr->revid); in cdns_pcie_ep_write_header()27 cdns_pcie_ep_fn_writeb(pcie, fn, PCI_CLASS_PROG, hdr->progif_code); in cdns_pcie_ep_write_header()[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/7 #include <dt-bindings/phy/phy.h>8 #include <dt-bindings/mux/mux.h>9 #include <dt-bindings/mux/ti-serdes.h>12 cmn_refclk: clock-cmnrefclk {13 #clock-cells = <0>;14 compatible = "fixed-clock";15 clock-frequency = <0>;18 cmn_refclk1: clock-cmnrefclk1 {[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */5 * Copyright (C) 2018-2019 Cadence.6 * Copyright (C) 2017-2018 NXP17 * USBSS-DEV register interface.22 * struct cdns3_usb_regs - device controller registers.38 * @ep_ien: EP Interrupt Enable.39 * @ep_ists: EP Interrupt Status.52 * @buf_addr: Address for On-chip Buffer operations.53 * @buf_data: Data for On-chip Buffer operations.54 * @buf_ctrl: On-chip Buffer Access Control.[all …]
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