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/OK3568_Linux_fs/kernel/drivers/pwm/
H A Dpwm-gpio.c14 * This driver adds a high-resolution timer based PWM driver. Since this is a
15 * bit-banged driver, accuracy will always depend on a lot of factors, such as
50 enum pwm_polarity polarity = pwm_get_polarity(pc->chip.pwms); in gpio_pwm_off()
52 gpiod_set_value(pc->gpiod, polarity ? 1 : 0); in gpio_pwm_off()
57 enum pwm_polarity polarity = pwm_get_polarity(pc->chip.pwms); in gpio_pwm_on()
59 gpiod_set_value(pc->gpiod, polarity ? 0 : 1); in gpio_pwm_on()
67 if (!pwm_is_enabled(pc->chip.pwms)) { in gpio_pwm_timer()
69 pc->pin_on = false; in gpio_pwm_timer()
73 if (!pc->pin_on) { in gpio_pwm_timer()
74 hrtimer_forward_now(&pc->timer, ns_to_ktime(pc->on_time)); in gpio_pwm_timer()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/
H A Dpwm-gpio.txt1 Generic GPIO bit-banged PWM driver
4 - compatible: should be "pwm-gpio"
5 - #pwm-cells: should be 3, see pwm.txt in this directory for a general
7 - pwm-gpio: one gpio describing the used gpio, see the gpio bindings for the used gpio driver.
10 #include <dt-bindings/gpio/gpio.h>
12 pwm-gpio {
13 compatible = "pwm-gpio";
14 #pwm-cells = <3>;
15 pwm-gpio = <&pio 7 1 GPIO_ACTIVE_HIGH>;
/OK3568_Linux_fs/u-boot/include/configs/
H A Dsnapper9260.h8 * SPDX-License-Identifier: GPL-2.0+
36 #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
85 /* I2C - Bit-bashed */
87 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
101 #define I2C_SDA(bit) do { \ argument
102 if (bit) { \
106 at91_set_gpio_value(AT91_PIN_PA23, bit); \
109 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit) argument
130 /* U-Boot memory settings */
H A Dethernut5.h7 * SPDX-License-Identifier: GPL-2.0+
15 /* The first stage boot loader expects u-boot running at this address. */
34 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
46 - CONFIG_SYS_MALLOC_LEN)
48 /* 512kB on-chip NOR flash */
57 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
118 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
137 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit) argument
138 #define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTA, 23, bit) argument
161 /* Misc. u-boot settings */
H A Dvct.h4 * SPDX-License-Identifier: GPL-2.0+
53 #define CONFIG_SYS_NS16550_REG_SIZE -4
89 * Only Premium/Platinum have USB-EHCI support right now
105 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
138 * For the non-memory-mapped NOR FLASH, we need to define the
141 * U-Boot code, before the NOR FLASH is detected.
177 #define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
185 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
190 * Software (bit-bang) I2C driver configuration
205 #define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit) argument
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H A DMPC8560ADS.h6 * SPDX-License-Identifier: GPL-2.0+
26 * assume U-Boot is less than 0.5MB
31 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
87 #define CONFIG_SYS_DDR_CS0_BNDS 0x00000007 /* 0-128MB */
90 #define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */
102 #define CONFIG_SYS_BR0_PRELIM 0xff001801 /* port size 32bit */
135 * port-size = 32-bits = BR2[19:20] = 11
155 * 9 columns OR2[19-21] = 010
156 * 13 rows OR2[23-25] = 100
190 * 32KB, 8-bit wide for ADS config reg
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H A DM54418TWR.h4 * Copyright 2010-2012 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 * SPDX-License-Identifier: GPL-2.0+
11 * board/config.h - configuration options, board specific
79 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
102 "uboot=u-boot.bin\0" \
116 "u-boot=u-boot.bin\0" \
117 "load=tftp ${loadaddr} ${u-boot};\0" \
130 "u-boot=u-boot.bin\0" \
131 "load=tftp ${loadaddr) ${u-boot}\0" \
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H A DMPC8349EMDS.h2 * (C) Copyright 2006-2010
5 * SPDX-License-Identifier: GPL-2.0+
73 * 32-bit data path mode.
75 * Please note that using this mode for devices with the real density of 64-bit
79 * 128MB); normally this define should be used for devices with real 32-bit
92 * DDRCDR - DDR Control Driver Register
125 #define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */
130 /* set burst length to 8 for 32-bit data path */
134 /* the default burst length is 4 - for 64-bit data path */
158 | BR_PS_16 /* 16 bit port */ \
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/
H A Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO devicetree bindings
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
17 - $ref: "/schemas/spi/spi-controller.yaml#"
21 const: spi-gpio
23 sck-gpios:
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/OK3568_Linux_fs/u-boot/doc/
H A DREADME.bitbangMII1 This patch rewrites the miiphybb ( Bit-banged MII bus driver ) in order to
4 buses are implemented via bit-banging mode.
9 CONFIG_BITBANGMII - Enable the miiphybb driver
10 CONFIG_BITBANGMII_MULTI - Enable the multi bus support
15 MII_INIT - Generic code to enable the MII bus (optional)
16 MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional)
17 MDIO_ACTIVE - Activate the MDIO pin as out pin
18 MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
19 MDIO_READ - Read the MDIO pin
20 MDIO(v) - Write v on the MDIO pin
[all …]
/OK3568_Linux_fs/kernel/drivers/misc/eeprom/
H A Ddigsy_mtc_eeprom.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * FIXME: this driver is used on a device-tree probed platform: it
9 * should be defined as a bit-banged SPI device and probed from the device
/OK3568_Linux_fs/u-boot/drivers/net/phy/
H A DKconfig3 bool "Bit-banged ethernet MII management channel support"
118 bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
121 Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
154 bool "Fixed-Link PHY"
157 Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
160 on, the link is always up with fixed speed and fixed duplex-setting.
161 More information: doc/device-tree-bindings/net/fixed-link.txt
H A Dmiiphybb.c3 * Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
8 * SPDX-License-Identifier: GPL-2.0+
12 * This provides a bit-banged interface to the ethernet MII management
116 BB_MII_RELOCATE(bb_miiphy_buses[i].init, gd->reloc_off); in bb_miiphy_init()
117 BB_MII_RELOCATE(bb_miiphy_buses[i].mdio_active, gd->reloc_off); in bb_miiphy_init()
118 BB_MII_RELOCATE(bb_miiphy_buses[i].mdio_tristate, gd->reloc_off); in bb_miiphy_init()
119 BB_MII_RELOCATE(bb_miiphy_buses[i].set_mdio, gd->reloc_off); in bb_miiphy_init()
120 BB_MII_RELOCATE(bb_miiphy_buses[i].get_mdio, gd->reloc_off); in bb_miiphy_init()
121 BB_MII_RELOCATE(bb_miiphy_buses[i].set_mdc, gd->reloc_off); in bb_miiphy_init()
122 BB_MII_RELOCATE(bb_miiphy_buses[i].delay, gd->reloc_off); in bb_miiphy_init()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/dsa/
H A Drealtek-smi.txt1 Realtek SMI-based Switches
4 The SMI "Simple Management Interface" is a two-wire protocol using
5 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
7 SMI-based Realtek devices.
11 - compatible: must be exactly one of:
22 - mdc-gpios: GPIO line for the MDC clock line.
23 - mdio-gpios: GPIO line for the MDIO data line.
24 - reset-gpios: GPIO line for the reset signal.
27 - realtek,disable-leds: if the LED drivers are not used in the
33 - interrupt-controller
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/OK3568_Linux_fs/u-boot/include/configs/km/
H A Dkm_arm.h9 * (C) Copyright 2010-2011
12 * SPDX-License-Identifier: GPL-2.0+
17 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
36 #include "keymile-common.h"
56 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
57 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
59 /* pseudo-non volatile RAM [hex] */
74 "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \
92 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
153 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
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/OK3568_Linux_fs/u-boot/board/freescale/m53017evb/
H A DREADME4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m53017evb/m53017evb.c Dram setup
13 - board/freescale/m53017evb/mii.c Mii access
14 - board/freescale/m53017evb/Makefile Makefile
15 - board/freescale/m53017evb/config.mk config make
16 - board/freescale/m53017evb/u-boot.lds Linker description
18 - arch/m68k/cpu/mcf532x/cpu.c cpu specific code
19 - arch/m68k/cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs
20 - arch/m68k/cpu/mcf532x/interrupts.c cpu specific interrupt support
21 - arch/m68k/cpu/mcf532x/speed.c system, flexbus, and cpu clock
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/m52277evb/
H A DREADME4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m52277evb/m52277evb.c Dram setup
13 - board/freescale/m52277evb/Makefile Makefile
14 - board/freescale/m52277evb/config.mk config make
15 - board/freescale/m52277evb/u-boot.lds Linker description
17 - arch/m68k/cpu/mcf5227x/cpu.c cpu specific code
18 - arch/m68k/cpu/mcf5227x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs
19 - arch/m68k/cpu/mcf5227x/interrupts.c cpu specific interrupt support
20 - arch/m68k/cpu/mcf5227x/speed.c system, flexbus, and cpu clock
21 - arch/m68k/cpu/mcf5227x/Makefile Makefile
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/m547xevb/
H A DREADME4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m547xevb/m547xevb.c Dram setup, IDE pre init, and PCI init
13 - board/freescale/m547xevb/mii.c MII init
14 - board/freescale/m547xevb/Makefile Makefile
15 - board/freescale/m547xevb/config.mk config make
16 - board/freescale/m547xevb/u-boot.lds Linker description
18 - arch/m68k/cpu/mcf547x_8x/cpu.c cpu specific code
19 - arch/m68k/cpu/mcf547x_8x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
20 - arch/m68k/cpu/mcf547x_8x/interrupts.c cpu specific interrupt support
21 - arch/m68k/cpu/mcf547x_8x/slicetimer.c Timer support
[all …]
/OK3568_Linux_fs/kernel/drivers/bus/
H A Dts-nbus.c2 * NBUS driver for TS-4600 based boards
4 * Copyright (c) 2016 - Savoir-faire Linux
11 * This driver implements a GPIOs bit-banged bus, called the NBUS by Technologic
13 * TS-4600 SoM.
24 #include <linux/ts-nbus.h>
48 ts_nbus->data = devm_gpiod_get_array(&pdev->dev, "ts,data", in ts_nbus_init_pdata()
50 if (IS_ERR(ts_nbus->data)) { in ts_nbus_init_pdata()
51 dev_err(&pdev->dev, "failed to retrieve ts,data-gpio from dts\n"); in ts_nbus_init_pdata()
52 return PTR_ERR(ts_nbus->data); in ts_nbus_init_pdata()
55 ts_nbus->csn = devm_gpiod_get(&pdev->dev, "ts,csn", GPIOD_OUT_HIGH); in ts_nbus_init_pdata()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpio/
H A Dgpio.txt5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
32 data-gpios = <&gpio1 12 0>,
44 recommended to use the two-cell approach.
48 include/dt-bindings/gpio/gpio.h whenever possible:
[all …]
/OK3568_Linux_fs/kernel/drivers/spi/
H A Dspi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
26 * platform_device->driver_data ... points to spi_gpio
28 * spi->controller_state ... reserved for bitbang framework code
30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
41 /*----------------------------------------------------------------------*/
45 * per transferred bit can make performance a problem, this code
48 * - The slow generic way: set up platform_data to hold the GPIO
52 * - The quicker inlined way: only helps with platform GPIO code
63 * #include "spi-gpio.c"
73 /*----------------------------------------------------------------------*/
[all …]
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/gpio/
H A Dgpio.txt5 -----------------
8 properties, each containing a 'gpio-list':
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17 of this GPIO for the device. While a non-existent <name> is considered valid
31 and bit-banged data signals:
34 gpio-controller
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/m5373evb/
H A DREADME4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m5373evb/m5373evb.c Dram setup
13 - board/freescale/m5373evb/mii.c Mii access
14 - board/freescale/m5373evb/Makefile Makefile
15 - board/freescale/m5373evb/config.mk config make
16 - board/freescale/m5373evb/u-boot.lds Linker description
18 - arch/m68k/cpu/mcf532x/cpu.c cpu specific code
19 - arch/m68k/cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs
20 - arch/m68k/cpu/mcf532x/interrupts.c cpu specific interrupt support
21 - arch/m68k/cpu/mcf532x/speed.c system, pci, flexbus, and cpu clock
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/m54455evb/
H A DREADME4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m54455evb/m54455evb.c Dram setup, IDE pre init, and PCI init
13 - board/freescale/m54455evb/flash.c Atmel and INTEL flash support
14 - board/freescale/m54455evb/Makefile Makefile
15 - board/freescale/m54455evb/config.mk config make
16 - board/freescale/m54455evb/u-boot.lds Linker description
18 - common/cmd_bdinfo.c Clock frequencies output
19 - common/cmd_mii.c mii support
21 - arch/m68k/cpu/mcf5445x/cpu.c cpu specific code
22 - arch/m68k/cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
24 stdout-path = "uart0:19200n8";
28 compatible = "gpio-keys";
[all …]

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