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/OK3568_Linux_fs/kernel/drivers/dma/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 config DMADEVICES_DEBUG
24 config DMADEVICES_VDEBUG
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
44 config DMA_ENGINE
47 config DMA_VIRTUAL_CHANNELS
50 config DMA_ACPI
54 config DMA_OF
60 config ALTERA_MSGDMA
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/OK3568_Linux_fs/kernel/drivers/bus/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
8 config ARM_CCI
11 config ARM_CCI400_COMMON
15 config ARM_CCI400_PORT_CTRL
23 config ARM_INTEGRATOR_LM
32 config BRCMSTB_GISB_ARB
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
41 config BT1_APB
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie.txt3 - compatible:
7 - "qcom,pcie-ipq8064" for ipq8064
8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
9 - "qcom,pcie-apq8064" for apq8064
10 - "qcom,pcie-apq8084" for apq8084
11 - "qcom,pcie-msm8996" for msm8996 or apq8096
12 - "qcom,pcie-ipq4019" for ipq4019
13 - "qcom,pcie-ipq8074" for ipq8074
14 - "qcom,pcie-qcs404" for qcs404
15 - "qcom,pcie-sdm845" for sdm845
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/OK3568_Linux_fs/kernel/sound/soc/adi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config SND_SOC_ADI
8 config SND_SOC_ADI_AXI_I2S
9 tristate "AXI-I2S support"
14 ASoC driver for the Analog Devices AXI-I2S softcore peripheral.
16 config SND_SOC_ADI_AXI_SPDIF
17 tristate "AXI-SPDIF support"
22 ASoC driver for the Analog Devices AXI-SPDIF softcore peripheral.
/OK3568_Linux_fs/kernel/drivers/staging/axis-fifo/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 # "Xilinx AXI-Stream FIFO IP core driver"
5 config XIL_AXIS_FIFO
6 tristate "Xilinx AXI-Stream FIFO IP core driver"
9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.
10 The AXI Streaming FIFO allows memory mapped access to a AXI Streaming
11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
12 to the AXI Ethernet without the need to use DMA.
/OK3568_Linux_fs/kernel/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet_main.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xilinx Axi Ethernet device driver
6 * Copyright (c) 2005-2008 DLA Systems, David H. Lynch Jr. <dhlii@dlasys.net>
7 * Copyright (c) 2008-2009 Secret Lab Technologies Ltd.
8 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
9 * Copyright (c) 2010 - 2011 PetaLogix
11 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
13 * This is a driver for the Xilinx Axi Ethernet which is used in the Virtex6
17 * - Add Axi Fifo support.
18 * - Factor out Axi DMA code into separate driver.
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 config NET_VENDOR_XILINX
19 config XILINX_EMACLITE
26 config XILINX_AXI_EMAC
27 tristate "Xilinx 10/100/1000 AXI Ethernet support"
31 AXI bus interface used in Xilinx Virtex FPGAs and Soc's.
33 config XILINX_LL_TEMAC
34 tristate "Xilinx LL TEMAC (LocalLink Tri-mode Ethernet MAC) driver"
H A Dxilinx_axienet.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Definitions for Xilinx Axi Ethernet device driver.
6 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
72 /* Axi DMA Register definitions */
144 /* Axi Ethernet registers definition */
147 #define XAE_IFGP_OFFSET 0x00000008 /* Tx Inter-frame gap adjustment*/
165 #define XAE_MDIO_MC_OFFSET 0x00000500 /* MII Management Config */
179 /* Bit Masks for Axi Ethernet RAF register */
198 /* Bit Masks for Axi Ethernet TPF and IFGP registers */
200 /* Transmit inter-frame gap adjustment value */
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
88 * stmmac_axi_setup - parse DT parameters for programming the AXI register
91 * if required, from device-tree the AXI internal register can be tuned
97 struct stmmac_axi *axi; in stmmac_axi_setup() local
99 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); in stmmac_axi_setup()
103 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); in stmmac_axi_setup()
104 if (!axi) { in stmmac_axi_setup()
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H A Dstmmac_pci.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2011-2012 Vayavya Labs Pvt Ltd
12 #include <linux/clk-provider.h>
24 plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ in common_default_data()
25 plat->has_gmac = 1; in common_default_data()
26 plat->force_sf_dma_mode = 1; in common_default_data()
28 plat->mdio_bus_data->needs_reset = true; in common_default_data()
31 plat->multicast_filter_bins = HASH_TABLE_SIZE; in common_default_data()
34 plat->unicast_filter_entries = 1; in common_default_data()
37 plat->maxmtu = JUMBO_LEN; in common_default_data()
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H A Ddwmac-intel.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/clk-provider.h>
8 #include "dwmac-intel.h"
41 int func = PCI_FUNC(pdev->devfn); in stmmac_pci_find_phy_addr()
46 return -ENODEV; in stmmac_pci_find_phy_addr()
48 dmi_data = dmi_id->driver_data; in stmmac_pci_find_phy_addr()
49 func_data = dmi_data->func; in stmmac_pci_find_phy_addr()
51 for (n = 0; n < dmi_data->nfuncs; n++, func_data++) in stmmac_pci_find_phy_addr()
52 if (func_data->func == func) in stmmac_pci_find_phy_addr()
53 return func_data->phy_addr; in stmmac_pci_find_phy_addr()
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H A Ddwmac4_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
17 static void dwmac4_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi) in dwmac4_dma_axi() argument
22 pr_info("dwmac4: Master AXI performs %s burst length\n", in dwmac4_dma_axi()
25 if (axi->axi_lpi_en) in dwmac4_dma_axi()
27 if (axi->axi_xit_frm) in dwmac4_dma_axi()
31 value |= (axi->axi_wr_osr_lmt & DMA_AXI_OSR_MAX) << in dwmac4_dma_axi()
35 value |= (axi->axi_rd_osr_lmt & DMA_AXI_OSR_MAX) << in dwmac4_dma_axi()
38 /* Depending on the UNDEF bit the Master AXI will perform any burst in dwmac4_dma_axi()
43 switch (axi->axi_blen[i]) { in dwmac4_dma_axi()
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/OK3568_Linux_fs/kernel/Documentation/admin-guide/perf/
H A Dimx-ddr.rst10 Selection of the value for each counter is done via the config registers. There
16 The "format" directory describes format of the config (event ID) and config1
17 (AXI filtering) fields of the perf_event_attr structure, see /sys/bus/event_source/
23 .. code-block:: bash
25 perf stat -a -e imx8_ddr0/cycles/ cmd
26 perf stat -a -e imx8_ddr0/read/,imx8_ddr0/write/ cmd
28 AXI filtering is only used by CSV modes 0x41 (axid-read) and 0x42 (axid-write)
32 indicates whether PMU supports AXI ID filter or not; enhanced_filter indicates
33 whether PMU supports enhanced AXI ID filter or not. Value 0 for un-supported, and
38 --AXI_ID defines AxID matching value.
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/OK3568_Linux_fs/kernel/arch/arc/plat-axs10x/
H A Daxs10x.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
12 #include <asm/asm-offsets.h>
34 * --------------------- in axs10x_enable_gpio_intc_wire()
35 * | snps,arc700-intc | in axs10x_enable_gpio_intc_wire()
36 * --------------------- in axs10x_enable_gpio_intc_wire()
38 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire()
39 * | snps,dw-apb-gpio | | snps,dw-apb-gpio | in axs10x_enable_gpio_intc_wire()
40 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire()
44 * ------------------------ in axs10x_enable_gpio_intc_wire()
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/freescale/fman/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config FSL_FMAN
10 Freescale Data-Path Acceleration Architecture Frame Manager
13 config DPAA_ERRATUM_A050385
25 such that more than 17 AXI transactions are in flight from FMAN
29 1. FMAN AXI transaction crosses 4K address boundary (Errata
31 2. FMAN DMA address for an AXI transaction is not 16 byte
32 aligned, i.e. the last 4 bits of an address are non-zero
39 stress with multiple ports injecting line-rate traffic.
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dsoc.h5 * SPDX-License-Identifier: GPL-2.0+
89 u32 res1[0xa4/4]; /* 0x0 - 0xa4 */
90 u32 pcfg; /* port config */
91 u32 ppcfg; /* port phy1 config */
92 u32 pp2c; /* port phy2 config */
93 u32 pp3c; /* port phy3 config */
94 u32 pp4c; /* port phy4 config */
95 u32 pp5c; /* port phy5 config */
96 u32 axicc; /* AXI cache control */
97 u32 paxic; /* port AXI config */
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/OK3568_Linux_fs/kernel/drivers/dma/xilinx/
H A Dxilinx_dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
10 * The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP
11 * core that provides high-bandwidth direct memory access between memory
12 * and AXI4-Stream type video target peripherals. The core provides efficient
18 * registers are accessed through an AXI4-Lite slave interface.
20 * The AXI Direct Memory Access (AXI DMA) core is a soft Xilinx IP core that
21 * provides high-bandwidth one dimensional direct memory access between memory
22 * and AXI4-Stream target peripherals. It supports one receive and one
25 * The AXI CDMA, is a soft IP, which provides high-bandwidth Direct Memory
[all …]
/OK3568_Linux_fs/kernel/drivers/pci/controller/mobiveil/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
6 config PCIE_MOBIVEIL
9 config PCIE_MOBIVEIL_HOST
14 config PCIE_MOBIVEIL_PLAT
15 bool "Mobiveil AXI PCIe controller"
21 Say Y here if you want to enable support for the Mobiveil AXI PCIe
25 config PCIE_LAYERSCAPE_GEN4
/OK3568_Linux_fs/buildroot/arch/
H A DConfig.in3 config BR2_ARCH_IS_64
6 config BR2_KERNEL_64_USERLAND_32
9 config BR2_SOFT_FLOAT
12 config BR2_ARCH_HAS_MMU_MANDATORY
15 config BR2_ARCH_HAS_MMU_OPTIONAL
24 config BR2_arcle
29 32-bit CPUs that can be used from deeply embedded to high
32 config BR2_arceb
37 32-bit CPUs that can be used from deeply embedded to high
40 config BR2_arm
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/OK3568_Linux_fs/u-boot/drivers/pci/
H A DKconfig11 config DM_PCI
16 orgnising devices in U-Boot. For PCI, driver model keeps track of
20 config DM_PCI_COMPAT
29 config PCI_PNP
36 config PCIE_DW_MVEBU
37 bool "Enable Armada-8K PCIe driver (DesignWare core)"
43 Armada-8K SoCs. The PCIe controller on Armada-8K is based on
46 config PCI_SANDBOX
56 config PCI_TEGRA
65 support to work (e.g. beaver, jetson-tk1).
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
6 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <1>;
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/OK3568_Linux_fs/u-boot/drivers/fpga/
H A Dsocfpga_gen5.c5 * SPDX-License-Identifier: BSD-3-Clause
27 clrsetbits_le32(&fpgamgr_regs->ctrl, in fpgamgr_set_cd_ratio()
38 msel = readl(&fpgamgr_regs->stat); in fpgamgr_program_init()
47 setbits_le32(&fpgamgr_regs->ctrl, in fpgamgr_program_init()
62 clrbits_le32(&fpgamgr_regs->ctrl, in fpgamgr_program_init()
78 clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_NCE_MASK); in fpgamgr_program_init()
81 setbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_EN_MASK); in fpgamgr_program_init()
84 setbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_NCONFIGPULL_MASK); in fpgamgr_program_init()
95 return -1; in fpgamgr_program_init()
99 clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_NCONFIGPULL_MASK); in fpgamgr_program_init()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: "snps,dwmac.yaml#"
27 - items:
28 - enum:
[all …]
H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.50a
25 - snps,dwmac-3.610
26 - snps,dwmac-3.70a
[all …]
/OK3568_Linux_fs/kernel/arch/microblaze/include/asm/
H A Dpvr.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2009 - 2011 Michal Simek <monstr@monstr.eu>
7 * Copyright (C) 2007 - 2011 PetaLogix
40 #define PVR2_D_OPB_MASK 0x80000000 /* or AXI */
42 #define PVR2_I_OPB_MASK 0x20000000 /* or AXI */
65 #define PVR2_IOPB_BUS_EXC_MASK 0x00000008 /* or AXI */
66 #define PVR2_DOPB_BUS_EXC_MASK 0x00000004 /* or AXI */
77 /* ICache config PVR masks */
86 /* DCache config PVR masks */

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