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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/timer/
H A Darm,arch_timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM architected timer
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
14 or a memory mapped architected timer, which provides up to 8 frames with a
15 physical and optional virtual timer per frame.
[all …]
H A Darm,arch_timer_mmio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM memory mapped architected timer
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
14 ARM cores may have a memory mapped architected timer, which provides up to 8
15 frames with a physical and optional virtual timer per frame.
17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
[all …]
H A Darm,armv7m-systick.txt1 * ARMv7M System Timer
3 ARMv7-M includes a system timer, known as SysTick. Current driver only
7 - compatible : Should be "arm,armv7m-systick"
8 - reg : The address range of the timer
11 - clocks : The input clock of the timer
12 - clock-frequency : The rate in HZ in input of the ARM SysTick
16 systick: timer@e000e010 {
17 compatible = "arm,armv7m-systick";
22 systick: timer@e000e010 {
23 compatible = "arm,armv7m-systick";
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rmobile/
H A Dtimer.c5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch-armv7/globaltimer.h>
21 u64 timer; in get_cpu_global_timer() local
23 u32 old = readl(&global_timer->cnt_h); in get_cpu_global_timer()
25 low = readl(&global_timer->cnt_l); in get_cpu_global_timer()
26 high = readl(&global_timer->cnt_h); in get_cpu_global_timer()
33 timer = high; in get_cpu_global_timer()
34 return (u64)((timer << 32) | low); in get_cpu_global_timer()
39 u64 timer = get_cpu_global_timer(); in get_time_us() local
41 timer = ((timer << 2) + (CLK2MHZ(CONFIG_SYS_CPU_CLK) >> 1)); in get_time_us()
[all …]
/OK3568_Linux_fs/external/security/rk_tee_user/v2/export-ta_arm32/host_include/
H A Darm32_user_sysreg.h7 /* ARMv7-A and ARMv7-R edition */
10 /* B8.2 Generic Timer registers summary */
/OK3568_Linux_fs/u-boot/arch/arm/mach-highbank/
H A Dtimer.c2 * Copyright 2010-2011 Calxeda, Inc.
4 * Based on arm926ejs/mx27/timer.c
6 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch-armv7/systimer.h>
14 #define SYSTIMER_BASE 0xFFF34000 /* Timer 0 and 1 base */
19 * Start the timer
26 writel(0, &systimer_base->timer0control); in timer_init()
27 writel(SYSTIMER_RELOAD, &systimer_base->timer0load); in timer_init()
28 writel(SYSTIMER_RELOAD, &systimer_base->timer0value); in timer_init()
30 &systimer_base->timer0control); in timer_init()
/OK3568_Linux_fs/u-boot/drivers/timer/
H A Dsti-timer.c4 * SPDX-License-Identifier: GPL-2.0+
10 #include <timer.h>
13 #include <asm/arch-armv7/globaltimer.h>
24 struct globaltimer *global_timer = priv->global_timer; in sti_timer_get_count()
26 u64 timer; in sti_timer_get_count() local
27 u32 old = readl(&global_timer->cnt_h); in sti_timer_get_count()
30 low = readl(&global_timer->cnt_l); in sti_timer_get_count()
31 high = readl(&global_timer->cnt_h); in sti_timer_get_count()
37 timer = high; in sti_timer_get_count()
38 *count = (u64)((timer << 32) | low); in sti_timer_get_count()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dmilbeaut-m10v.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/irq.h>
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
[all …]
H A Decx-2000.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
6 /dts-v1/;
12 model = "Calxeda ECX-2000";
13 compatible = "calxeda,ecx-2000";
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a15";
[all …]
H A Dxenvm-4.2.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
10 /dts-v1/;
13 model = "XENVM-4.2";
14 compatible = "xen,xenvm-4.2", "xen,xenvm";
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
H A Dmt8127.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 interrupt-parent = <&sysirq>;
18 #address-cells = <1>;
19 #size-cells = <0>;
20 enable-method = "mediatek,mt81xx-tz-smp";
24 compatible = "arm,cortex-a7";
[all …]
H A Defm32gg.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf
9 #include "armv7-m.dtsi"
10 #include "dt-bindings/clock/efm32-cmu.h"
13 #address-cells = <1>;
14 #size-cells = <1>;
31 compatible = "energymicro,efm32-adc";
39 compatible = "energymicro,efm32-gpio";
42 gpio-controller;
43 #gpio-cells = <2>;
[all …]
H A Dbcm2836.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "bcm2835-common.dtsi"
4 #include "bcm2835-rpi-common.dtsi"
12 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
15 compatible = "brcm,bcm2836-l1-intc";
17 interrupt-controller;
18 #interrupt-cells = <2>;
19 interrupt-parent = <&local_intc>;
23 arm-pmu {
24 compatible = "arm,cortex-a7-pmu";
[all …]
H A Daxm55xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/lsi,axm5516-clks.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&gic>;
21 timer = &timer0;
25 compatible = "simple-bus";
26 #address-cells = <2>;
27 #size-cells = <2>;
[all …]
H A Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
28 arm_a7_pmu: arm-a7-pmu {
29 compatible = "arm,cortex-a7-pmu";
30 interrupt-parent = <&gic>;
38 arm_a15_pmu: arm-a15-pmu {
39 compatible = "arm,cortex-a15-pmu";
40 interrupt-parent = <&combiner>;
48 timer: timer { label
49 compatible = "arm,armv7-timer";
[all …]
H A Dalpine.dtsi27 #include <dt-bindings/interrupt-controller/arm-gic.h>
30 #address-cells = <2>;
31 #size-cells = <2>;
42 #address-cells = <1>;
43 #size-cells = <0>;
44 enable-method = "al,alpine-smp";
47 compatible = "arm,cortex-a15";
50 clock-frequency = <1700000000>;
54 compatible = "arm,cortex-a15";
57 clock-frequency = <1700000000>;
[all …]
/OK3568_Linux_fs/u-boot/tools/patman/
H A Dtest.py1 # -*- coding: utf-8 -*-
5 # SPDX-License-Identifier: GPL-2.0+
30 Date: Thu, 28 Apr 2011 09:58:51 -0700
33 This adds functions to enable/disable clocks and reset to on-chip peripherals.
37 ‘u64 {aka long unsigned int}’ [-Wformat=]
39 BUG=chromium-os:13875
40 TEST=build U-Boot for Seaboard, boot
42 Change-Id: I80fe1d0c0b7dd10aa58ce5bb1d9290b6664d5413
46 Signed-off-by: Simon Glass <sjg@chromium.org>
47 ---
[all …]
/OK3568_Linux_fs/kernel/drivers/clocksource/
H A Darm_arch_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
88 * Architected system timer support.
96 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_write() local
99 writel_relaxed(val, timer->base + CNTP_CTL); in arch_timer_reg_write()
102 writel_relaxed(val, timer->base + CNTP_TVAL); in arch_timer_reg_write()
106 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_write() local
109 writel_relaxed(val, timer->base + CNTV_CTL); in arch_timer_reg_write()
112 writel_relaxed(val, timer->base + CNTV_TVAL); in arch_timer_reg_write()
127 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_read() local
130 val = readl_relaxed(timer->base + CNTP_CTL); in arch_timer_reg_read()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dbcm2837.dtsi9 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12 compatible = "brcm,bcm2836-l1-intc";
14 interrupt-controller;
15 #interrupt-cells = <1>;
16 interrupt-parent = <&local_intc>;
20 timer {
21 compatible = "arm,armv7-timer";
22 interrupt-parent = <&local_intc>;
27 always-on;
31 #address-cells = <1>;
[all …]
H A Dbcm2836.dtsi9 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12 compatible = "brcm,bcm2836-l1-intc";
14 interrupt-controller;
15 #interrupt-cells = <1>;
16 interrupt-parent = <&local_intc>;
19 arm-pmu {
20 compatible = "arm,cortex-a7-pmu";
21 interrupt-parent = <&local_intc>;
26 timer {
27 compatible = "arm,armv7-timer";
[all …]
/OK3568_Linux_fs/kernel/arch/arm/oprofile/
H A Dcommon.c42 { "armv7_cortex_a8", "arm/armv7" },
43 { "armv7_cortex_a9", "arm/armv7-ca9" },
67 oprofile_add_trace(frame->pc); in report_trace()
68 (*depth)--; in report_trace()
78 * (struct frame_tail *)(xxx->fp)-1
103 return buftail[0].fp-1; in user_backtrace()
108 struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1; in arm_backtrace()
117 while (depth-- && tail && !((unsigned long) tail & 3)) in arm_backtrace()
123 /* provide backtrace support also in timer mode: */ in oprofile_arch_init()
124 ops->backtrace = arm_backtrace; in oprofile_arch_init()
/OK3568_Linux_fs/u-boot/include/configs/
H A Dtegra-common.h2 * (C) Copyright 2010-2012
5 * SPDX-License-Identifier: GPL-2.0+
21 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
40 * If this varies between SoCs later, move to tegraNN-common.h
53 /* turn on command-line edit/hist/auto */
70 /*-----------------------------------------------------------------------
85 CONFIG_SYS_INIT_RAM_SIZE - \
90 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
H A Drk3188_common.h4 * SPDX-License-Identifier: GPL-2.0+
13 #include "rockchip-common.h"
20 /* RK3188 do not have a ARMv7 ARCH timer */
24 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
32 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800)
37 /* spl size 32kb sram - 2kb bootrom */
38 #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800)
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv7/
H A D.suspend.o.cmd
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv8/
H A DMakefile2 # (C) Copyright 2000-2003
5 # SPDX-License-Identifier: GPL-2.0+
8 extra-y := start.o
10 obj-y += cpu.o
11 ifndef CONFIG_$(SPL_TPL_)TIMER
12 obj-y += generic_timer.o
14 obj-y += cache_v8.o
15 obj-y += exceptions.o
16 obj-y += cache.o
17 obj-y += tlb.o
[all …]

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