Searched +full:ahci +full:- +full:glue (Results 1 – 17 of 17) sorted by relevance
1 UniPhier glue reset controller4 Peripheral core reset in glue layer5 -----------------------------------7 Some peripheral core reset belongs to its own glue layer. Before using12 - compatible: Should be13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB314 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB315 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB316 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB317 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Socionext UniPhier AHCI PHY11 AHCI controller implemented on Socionext UniPhier SoCs.14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>19 - socionext,uniphier-pxs2-ahci-phy20 - socionext,uniphier-pxs3-ahci-phy25 "#phy-cells":[all …]
1 // SPDX-License-Identifier: GPL-2.03 // reset-uniphier-glue.c - Glue layer reset driver for UniPhier12 #include <linux/reset/reset-simple.h>33 struct device *dev = &pdev->dev; in uniphier_glue_reset_probe()42 return -ENOMEM; in uniphier_glue_reset_probe()44 priv->data = of_device_get_match_data(dev); in uniphier_glue_reset_probe()45 if (WARN_ON(!priv->data || priv->data->nclks > MAX_CLKS || in uniphier_glue_reset_probe()46 priv->data->nrsts > MAX_RSTS)) in uniphier_glue_reset_probe()47 return -EINVAL; in uniphier_glue_reset_probe()51 priv->rdata.membase = devm_ioremap_resource(dev, res); in uniphier_glue_reset_probe()[all …]
1 * UCTL SATA controller glue4 and the SATA AHCI host controller (UAHC). It performs the following functions:5 - provides interfaces for the applications to access the UAHC AHCI7 - provides a bridge for UAHC to fetch AHCI command table entries and data9 - posts interrupts to the CIU.10 - contains registers that:11 - control the behavior of the UAHC12 - control the clock/reset generation to UAHC13 - control endian swapping for all UAHC registers and DMA accesses17 - compatible: "cavium,octeon-7130-sata-uctl"[all …]
2 * SATA glue for Cavium Octeon III SOCs.9 * Copyright (C) 2010-2015 Cavium Networks14 #include <linux/dma-mapping.h>33 struct device *dev = &pdev->dev; in ahci_octeon_probe()34 struct device_node *node = dev->of_node; in ahci_octeon_probe()41 base = devm_ioremap_resource(&pdev->dev, res); in ahci_octeon_probe()64 return -ENODEV; in ahci_octeon_probe()69 dev_err(dev, "failed to add ahci-platform core\n"); in ahci_octeon_probe()82 { .compatible = "cavium,octeon-7130-sata-uctl", },91 .name = "octeon-ahci",
2 * AHCI glue platform driver for Marvell EBU SOCs6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>20 #include "ahci.h"22 #define DRV_NAME "ahci-mvebu"42 writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i)); in ahci_mvebu_mbus_config()43 writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i)); in ahci_mvebu_mbus_config()44 writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i)); in ahci_mvebu_mbus_config()47 for (i = 0; i < dram->num_cs; i++) { in ahci_mvebu_mbus_config()48 const struct mbus_dram_window *cs = dram->cs + i; in ahci_mvebu_mbus_config()50 writel((cs->mbus_attr << 8) | in ahci_mvebu_mbus_config()[all …]
7 #include <dt-bindings/bus/ti-sysc.h>8 #include <dt-bindings/clock/dm816.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/pinctrl/omap.h>14 interrupt-parent = <&intc>;15 #address-cells = <1>;16 #size-cells = <1>;30 #address-cells = <1>;31 #size-cells = <0>;33 compatible = "arm,cortex-a8";[all …]
1 // SPDX-License-Identifier: GPL-2.0-only6 #include "stih407-pinctrl.dtsi"7 #include <dt-bindings/mfd/st-lpc.h>8 #include <dt-bindings/phy/phy.h>9 #include <dt-bindings/reset/stih407-resets.h>10 #include <dt-bindings/interrupt-controller/irq-st.h>12 #address-cells = <1>;13 #size-cells = <1>;15 reserved-memory {16 #address-cells = <1>;[all …]
9 #include "stih407-pinctrl.dtsi"10 #include <dt-bindings/mfd/st-lpc.h>11 #include <dt-bindings/phy/phy.h>12 #include <dt-bindings/reset/stih407-resets.h>13 #include <dt-bindings/interrupt-controller/irq-st.h>15 #address-cells = <1>;16 #size-cells = <1>;18 reserved-memory {19 #address-cells = <1>;20 #size-cells = <1>;[all …]
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