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/OK3568_Linux_fs/kernel/drivers/phy/marvell/
H A Dphy-mvebu-a3700-utmi.c9 * Marvell A3700 UTMI PHY driver
21 /* Armada 3700 UTMI PHY registers */
62 * - The UTMI PHY wired to the USB3/USB2 controller (otg)
63 * - The UTMI PHY wired to the USB2 controller (host only)
88 struct mvebu_a3700_utmi *utmi = phy_get_drvdata(phy); in mvebu_a3700_utmi_phy_power_on() local
90 int usb32 = utmi->caps->usb32; in mvebu_a3700_utmi_phy_power_on()
98 reg = readl(utmi->regs + USB2_PHY_PLL_CTRL_REG0); in mvebu_a3700_utmi_phy_power_on()
102 writel(reg, utmi->regs + USB2_PHY_PLL_CTRL_REG0); in mvebu_a3700_utmi_phy_power_on()
105 regmap_update_bits(utmi->usb_misc, USB2_PHY_CTRL(usb32), in mvebu_a3700_utmi_phy_power_on()
111 reg = readl(utmi->regs + USB2_PHY_OTG_CTRL); in mvebu_a3700_utmi_phy_power_on()
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/at91/
H A Dclk-utmi.c42 struct clk_utmi *utmi = to_clk_utmi(hw); in clk_utmi_prepare() local
51 * the utmi clock. in clk_utmi_prepare()
78 if (utmi->regmap_sfr) { in clk_utmi_prepare()
79 regmap_update_bits(utmi->regmap_sfr, AT91_SFR_UTMICKTRIM, in clk_utmi_prepare()
86 regmap_update_bits(utmi->regmap_pmc, AT91_CKGR_UCKR, uckr, uckr); in clk_utmi_prepare()
88 while (!clk_utmi_ready(utmi->regmap_pmc)) in clk_utmi_prepare()
96 struct clk_utmi *utmi = to_clk_utmi(hw); in clk_utmi_is_prepared() local
98 return clk_utmi_ready(utmi->regmap_pmc); in clk_utmi_is_prepared()
103 struct clk_utmi *utmi = to_clk_utmi(hw); in clk_utmi_unprepare() local
105 regmap_update_bits(utmi->regmap_pmc, AT91_CKGR_UCKR, in clk_utmi_unprepare()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra20-usb-phy.txt13 - The register set of the PHY containing the UTMI pad control registers.
14 Present if-and-only-if phy_type == utmi.
15 - phy_type : Should be one of "utmi", "ulpi" or "hsic".
21 - timer: The timeout clock (clk_m). Present if phy_type == utmi.
22 - utmi-pads: The clock needed to access the UTMI pad control registers.
23 Present if phy_type == utmi.
32 - utmi-pads: The reset of the PHY containing the chip-wide UTMI pad control
38 Required PHY timing params for utmi phy, for all chips:
53 Required PHY timing params for utmi phy, only on Tegra30 and above:
70 - nvidia,has-utmi-pad-registers : boolean indicates whether this controller
[all …]
H A Dphy-rockchip-inno-usb3.txt15 * "u3phy-otg" for USB 3.0 PHY utmi
22 * "u3phy-utmi-mac" for the USB 3.0 PHY utmi MAC
23 * "u3phy-utmi-apb" for the USB 3.0 PHY utmi apb
32 * "u3phy_utmi" : USB 2.0 utmi phy.
39 Optional properties for utmi node:
69 "u3phy-pipe-mac", "u3phy-utmi-mac",
70 "u3phy-utmi-apb", "u3phy-pipe-apb";
75 u3phy_utmi: utmi@ff470000 {
H A Dphy-mvebu-utmi.txt1 MVEBU A3700 UTMI PHY
4 USB2 UTMI+ PHY controllers can be found on the following Marvell MVEBU SoCs:
10 different UTMI PHY.
15 * "marvell,a3700-utmi-host-phy" for the PHY connected to
17 * "marvell,a3700-utmi-otg-phy" for the PHY connected to
29 compatible = "marvell,armada-3700-utmi-host-phy";
H A Dphy-stm32-usbphyc.txt3 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
4 switch. It controls PHY configuration and status, and the UTMI+ switch that
16 |_ UTMI switch_______| OTG controller
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Domap-usb-host.txt43 * "refclk_60m_int" - 60MHz internal reference clock for UTMI clock mux
44 * "refclk_60m_ext_p1" - 60MHz external ref. clock for Port 1's UTMI clock mux.
45 * "refclk_60m_ext_p2" - 60MHz external ref. clock for Port 2's UTMI clock mux
46 * "utmi_p1_gfclk" - Port 1 UTMI clock mux.
47 * "utmi_p2_gfclk" - Port 2 UTMI clock mux.
48 * "usb_host_hs_utmi_p1_clk" - Port 1 UTMI clock gate.
49 * "usb_host_hs_utmi_p2_clk" - Port 2 UTMI clock gate.
50 * "usb_host_hs_utmi_p3_clk" - Port 3 UTMI clock gate.
/OK3568_Linux_fs/u-boot/drivers/clk/at91/
H A DKconfig9 PLLA, UTMI PLL. Clocks can also be a source clock of other
16 bool "Support UTMI PLL Clock"
19 This option is used to enable the AT91 UTMI PLL clock
21 output of 480 MHz UTMI PLL, The souce clock of the UTMI
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Darmada-cp110-master.dtsi251 cpm_utmi0: utmi@580000 {
252 compatible = "marvell,mvebu-utmi-2.6.0";
253 reg = <0x580000 0x1000>, /* utmi-unit */
255 <0x440440 0x4>; /* utmi-cfg */
256 utmi-port = <UTMI_PHY_TO_USB3_HOST0>;
260 cpm_utmi1: utmi@581000 {
261 compatible = "marvell,mvebu-utmi-2.6.0";
262 reg = <0x581000 0x1000>, /* utmi-unit */
264 <0x440444 0x4>; /* utmi-cfg */
265 utmi-port = <UTMI_PHY_TO_USB3_HOST1>;
H A Dtegra30.dtsi802 phy_type = "utmi";
814 phy_type = "utmi";
818 clock-names = "reg", "pll_u", "utmi-pads";
820 reset-names = "usb", "utmi-pads";
832 nvidia,has-utmi-pad-registers;
840 phy_type = "utmi";
851 phy_type = "utmi";
855 clock-names = "reg", "pll_u", "utmi-pads";
857 reset-names = "usb", "utmi-pads";
876 phy_type = "utmi";
[all …]
H A Dtegra20.dtsi649 phy_type = "utmi";
662 phy_type = "utmi";
667 clock-names = "reg", "pll_u", "timer", "utmi-pads";
669 reset-names = "usb", "utmi-pads";
678 nvidia,has-utmi-pad-registers;
703 reset-names = "usb", "utmi-pads";
711 phy_type = "utmi";
722 phy_type = "utmi";
727 clock-names = "reg", "pll_u", "timer", "utmi-pads";
729 reset-names = "usb", "utmi-pads";
H A Dtegra124.dtsi871 phy_type = "utmi";
883 phy_type = "utmi";
887 clock-names = "reg", "pll_u", "utmi-pads";
889 reset-names = "usb", "utmi-pads";
900 nvidia,has-utmi-pad-registers;
908 phy_type = "utmi";
920 phy_type = "utmi";
924 clock-names = "reg", "pll_u", "utmi-pads";
926 reset-names = "usb", "utmi-pads";
944 phy_type = "utmi";
[all …]
H A Dtegra114.dtsi678 phy_type = "utmi";
689 phy_type = "utmi";
693 clock-names = "reg", "pll_u", "utmi-pads";
695 reset-names = "usb", "utmi-pads";
706 nvidia,has-utmi-pad-registers;
714 phy_type = "utmi";
725 phy_type = "utmi";
729 clock-names = "reg", "pll_u", "utmi-pads";
731 reset-names = "usb", "utmi-pads";
/OK3568_Linux_fs/u-boot/drivers/phy/marvell/
H A Dcomphy_cp110.c1623 debug("stage: UTMI %d - Power down transceiver (power down Phy), Power down PLL, and SuspendDM\n", in comphy_utmi_power_down()
1625 /* Power down UTMI PHY */ in comphy_utmi_power_down()
1630 * If UTMI connected to USB Device, configure mux prior to PHY init in comphy_utmi_power_down()
1634 debug("stage: UTMI %d - Enable Device mode and configure UTMI mux\n", in comphy_utmi_power_down()
1636 /* USB3 Device UTMI enable */ in comphy_utmi_power_down()
1639 /* USB3 Device UTMI MUX */ in comphy_utmi_power_down()
1648 /* Enable Test UTMI select */ in comphy_utmi_power_down()
1653 /* Wait for UTMI power down */ in comphy_utmi_power_down()
1668 debug("stage: Configure UTMI PHY %d registers\n", utmi_index); in comphy_utmi_phy_config()
1729 debug("stage: UTMI %d - Power up transceiver(Power up Phy), and exit SuspendDM\n", in comphy_utmi_power_up()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/usb/
H A Dusb.yaml37 UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is selected, UTMI+ low
43 enum: [utmi, utmi_wide, ulpi, serial, hsic]
H A Domap-usb.txt13 specifying ULPI and UTMI respectively.
55 - utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
77 utmi-mode = <2>;
H A Datmel-usb.txt37 - clocks: Should reference the peripheral and the UTMI clocks
40 "usb_clk" for the UTMI clock
46 clocks = <&utmi>, <&uhphs_clk>;
115 clocks = <&utmi>, <&udphs_clk>;
H A Dhisilicon,histb-xhci.txt13 "utmi": for utmi clock
40 clock-names = "bus", "utmi", "pipe", "suspend";
/OK3568_Linux_fs/u-boot/drivers/usb/host/
H A Dutmi-armada100.c17 #include <asm/arch/utmi-armada100.h>
61 * Initialize USB host controller's UTMI Physical interface
71 /* Turn on 26Mhz ref clock for UTMI PLL */ in utmi_init()
78 /* Initialize UTMI transceiver */ in utmi_init()
H A Dehci-tegra.c75 unsigned utmi:1; /* 1 if port has external tranceiver, else 0 */ member
299 if (config->utmi) in usbf_reset_controller()
337 * controller can only talk to a UTMI PHY, so the PHY selection is in init_phy_mux()
346 /* set up the UTMI USB controller with the parameters provided */
556 /* Select UTMI parallel interface */ in init_utmi_usb_controller()
719 config->utmi = phy && 0 == strcmp("utmi", phy); in fdt_decode_usb()
731 …debug("legacy_mode=%d, utmi=%d, ulpi=%d, periph_id=%d, vbus=%d, phy_reset=%d, dr_mode=%d, reg=%p\n… in fdt_decode_usb()
732 config->has_legacy_mode, config->utmi, config->ulpi, in fdt_decode_usb()
761 if (!config->utmi) { in usb_common_init()
762 printf("tegrausb: Device mode only supported with UTMI PHY\n"); in usb_common_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/media/usb/dvb-usb-v2/
H A Drtl28xxu.h197 #define USB_VDRCTRL 0x2F10 /* UTMI vendor signal control */
198 #define USB_VSTAIN 0x2F14 /* UTMI vendor signal status in */
199 #define USB_VLOADM 0x2F18 /* UTMI load vendor signal status in */
200 #define USB_VSTAOUT 0x2F1C /* UTMI vendor signal status out */
201 #define USB_UTMI_TST 0x2F80 /* UTMI test */
202 #define USB_UTMI_STATUS 0x2F84 /* UTMI status */
/OK3568_Linux_fs/kernel/drivers/usb/phy/
H A Dphy-tegra-usb.c251 "Failed to enable UTMI-pads clock: %d\n", ret); in utmip_pad_open()
260 "Failed to initialize UTMI-pads reset: %d\n", ret); in utmip_pad_open()
267 "Failed to assert UTMI-pads reset: %d\n", ret); in utmip_pad_open()
276 "Failed to deassert UTMI-pads reset: %d\n", ret); in utmip_pad_open()
292 "Failed to enable UTMI-pads clock: %d\n", ret); in utmip_pad_close()
299 "Failed to assert UTMI-pads reset: %d\n", ret); in utmip_pad_close()
948 "Failed to read USB UTMI parameter %s: %d\n", in read_utmi_param()
967 dev_err(&pdev->dev, "Failed to get UTMI pad regs\n"); in utmi_phy_probe()
972 * Note that UTMI pad registers are shared by all PHYs, therefore in utmi_phy_probe()
978 dev_err(&pdev->dev, "Failed to remap UTMI pad regs\n"); in utmi_phy_probe()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dtegra30.dtsi917 phy_type = "utmi";
930 phy_type = "utmi";
934 clock-names = "reg", "pll_u", "utmi-pads";
936 reset-names = "usb", "utmi-pads";
949 nvidia,has-utmi-pad-registers;
957 phy_type = "utmi";
969 phy_type = "utmi";
973 clock-names = "reg", "pll_u", "utmi-pads";
975 reset-names = "usb", "utmi-pads";
995 phy_type = "utmi";
[all …]
H A Dtegra20.dtsi721 phy_type = "utmi";
735 phy_type = "utmi";
740 clock-names = "reg", "pll_u", "timer", "utmi-pads";
742 reset-names = "usb", "utmi-pads";
752 nvidia,has-utmi-pad-registers;
777 reset-names = "usb", "utmi-pads";
786 phy_type = "utmi";
798 phy_type = "utmi";
803 clock-names = "reg", "pll_u", "timer", "utmi-pads";
805 reset-names = "usb", "utmi-pads";
/OK3568_Linux_fs/u-boot/drivers/usb/ulpi/
H A DKconfig9 UTMI (USB PHY) via ULPI interface.
29 ULPI is wrapper on UTMI+ core that is used as

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