Home
last modified time | relevance | path

Searched full:uarts (Results 1 – 25 of 182) sorted by relevance

12345678

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/serial/
H A Dmtk-uart.txt5 * "mediatek,mt2701-uart" for MT2701 compatible UARTS
6 * "mediatek,mt2712-uart" for MT2712 compatible UARTS
7 * "mediatek,mt6580-uart" for MT6580 compatible UARTS
8 * "mediatek,mt6582-uart" for MT6582 compatible UARTS
9 * "mediatek,mt6589-uart" for MT6589 compatible UARTS
10 * "mediatek,mt6755-uart" for MT6755 compatible UARTS
11 * "mediatek,mt6765-uart" for MT6765 compatible UARTS
12 * "mediatek,mt6779-uart" for MT6779 compatible UARTS
13 * "mediatek,mt6795-uart" for MT6795 compatible UARTS
14 * "mediatek,mt6797-uart" for MT6797 compatible UARTS
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/brcm80211/include/
H A Dchipcommon.h156 /* UARTs */
233 #define CC_CAP_UARTS_MASK 0x00000003 /* Number of UARTs */
235 #define CC_CAP_UCLKSEL 0x00000018 /* UARTs clock select */
236 /* UARTs are driven by internal divided clock */
238 #define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */
/OK3568_Linux_fs/kernel/Documentation/ia64/
H A Dserial.rst23 - If there was no HCDP, we assumed there were UARTs at the
106 - Multiple UARTs selected as EFI console devices. EFI and
155 several UARTs. One of the UARTs is often used as a console; the
/OK3568_Linux_fs/u-boot/board/toradex/apalis_imx6/
H A DKconfig46 The UARTs must be used in DCE mode, RTS/CTS are swapped and
50 otherwise the UARTs are configuered in DTE mode.
/OK3568_Linux_fs/u-boot/arch/x86/cpu/baytrail/
H A Dcpu.c31 * Configure the BayTrail UART clock for the internal HS UARTs in hsuart_clock_set()
43 * Configure the internal clock of both SIO HS-UARTs, if they are enabled
53 /* Loop over the 2 HS-UARTs */ in arch_cpu_init_dm()
/OK3568_Linux_fs/kernel/drivers/tty/serial/
H A DKconfig135 This enables the driver for the on-chip UARTs of the Atmel
167 Say Y here if you wish to have the internal AT91 UARTs
170 64). This is necessary if you also want other UARTs, such as
171 external 8250/16C550 compatible UARTs.
204 This enables the driver for the on-chip UARTs of the Amlogic
224 This enables the driver for the on-chip UARTs of the Cirrus
241 Support for the on-chip UARTs on the Samsung S3C24XX series CPUs,
251 Internal node for the common case of 4 Samsung compatible UARTs
305 Support for the on-chip UARTs on the NVIDIA Tegra series SOCs
729 Those are UARTs completely different from the Standard UARTs on the
[all …]
/OK3568_Linux_fs/u-boot/drivers/serial/
H A Dserial_pl01x.c12 /* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */
201 * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
202 * Integrator CP has two UARTs, use the first one, at 38400-8-N-1
203 * Versatile PB has four UARTs.
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/
H A Dboard.c28 /* UARTs which we can enable */
170 * Set up the specified uarts
172 * @param uarts_ids Mask containing UARTs to init (UARTx)
/OK3568_Linux_fs/kernel/Documentation/arm/samsung-s3c24xx/
H A Dsuspend.rst89 access to the UARTs will cause the debug to stop.
92 care should be taken that any external clock sources that the UARTs
/OK3568_Linux_fs/u-boot/board/freescale/ls1021atwr/
H A DREADME55 - Ten UARTs comprised of two 16550 compliant DUARTs, and six low power
56 UARTs
/OK3568_Linux_fs/u-boot/board/freescale/ls1021aqds/
H A DREADME55 - Ten UARTs comprised of two 16550 compliant DUARTs, and six low power
56 UARTs
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/
H A Dbrcm,bcm7120-l2-intc.txt14 controller, in particular for UARTs
72 have a mux gate, typically UARTs. Setting these bits will make their
/OK3568_Linux_fs/kernel/arch/mips/include/asm/mach-loongson64/
H A Dboot_param.h92 struct uart_device uarts[MAX_UARTS]; member
221 struct uart_device uarts[MAX_UARTS]; member
/OK3568_Linux_fs/yocto/poky/meta/recipes-core/udev/eudev/
H A Dudev.rules111 # Samsung UARTS
114 # MXC UARTs
/OK3568_Linux_fs/kernel/arch/parisc/include/asm/
H A Dserial.h6 * This is used for 16550-compatible UARTs
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/linux/
H A Dserial_core.h53 #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
205 /* Altera UARTs */
/OK3568_Linux_fs/kernel/arch/arm/mach-omap1/
H A Dserial.c46 * Internal UARTs need to be initialized for the 8250 autoconfig to work
124 /* Don't look at UARTs higher than 2 for omap7xx */ in omap_serial_init()
/OK3568_Linux_fs/kernel/include/uapi/linux/
H A Dserial_core.h39 #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
188 /* Altera UARTs */
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/linux/
H A Dserial_core.h53 #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
205 /* Altera UARTs */
/OK3568_Linux_fs/kernel/arch/mips/loongson64/
H A Denv.c154 memcpy(loongson_sysconf.uarts, esys->uarts, in prom_init_env()
/OK3568_Linux_fs/kernel/drivers/tty/serial/8250/
H A D8250_exar.c144 * Exar UARTs have a SLEEP register that enables or disables each UART in exar_pm()
153 * XR17V35x UARTs have an extra fractional divisor register (DLD)
228 * XR17V35x UARTs have an extra divisor register, DLD that gets enabled in default_setup()
565 * These Exar UARTs have an extra interrupt indicator that could fire for a
826 /* Exar Corp. XR17V[48]35[248] Dual/Quad/Octal/Hexa PCIe UARTs */
/OK3568_Linux_fs/u-boot/board/hisilicon/hikey/
H A DKconfig20 The hi6220 SoC has 5 UARTs. For example to use UART0 enter 1 here.
/OK3568_Linux_fs/u-boot/board/ti/am57xx/
H A DKconfig17 The AM57x (and DRA7xx) SoC has a total of 6 UARTs available to it.
/OK3568_Linux_fs/u-boot/board/ti/dra7xx/
H A DKconfig17 The DRA7xx (and AM57x) SoC has a total of 6 UARTs available to it.
/OK3568_Linux_fs/u-boot/board/vscom/baltos/
H A DKconfig20 The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced

12345678