| /OK3568_Linux_fs/kernel/net/netfilter/ |
| H A D | nf_conntrack_proto_dccp.c | 91 #define sCG CT_DCCP_CLOSING macro
140 * sCG -> sIG Ignore, conntrack might be out of sync
143 * sNO, sRQ, sRS, sPO. sOP, sCR, sCG, sTW, */
154 * sCG -> sIG Ignore, might be response to ignored Request
158 * sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
169 * sCG -> sCG Ack in CLOSING MAY be processed (8.3.)
172 * sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
173 sIV, sIV, sPO, sPO, sOP, sCR, sCG, sIV
183 * sCG -> sCG Data in CLOSING MAY be processed (8.3.)
186 * sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx7ulp/ |
| H A D | scg.h | 31 /* SCG DDR Clock Control Register */
38 /* SCG NIC Clock Control Register */
57 /* SCG NIC clock status register */
72 /* SCG Slow IRC Control Status Register */
79 /* SCG Slow IRC Configuration Register */
85 /* SCG Slow IRC Divide Register */
100 /* SCG Fast IRC Control Status Register */
107 /* SCG Fast IRC Divide Register */
123 /* SCG System OSC Control Status Register */
127 /* SCG Fast IRC Divide Register */
[all …]
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| H A D | clock.h | 12 #include <asm/arch/scg.h>
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| H A D | pcc.h | 11 #include <asm/arch/scg.h>
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | imx7ulp-scg-clock.yaml | 4 $id: http://devicetree.org/schemas/clock/imx7ulp-scg-clock.yaml#
7 title: Clock bindings for Freescale i.MX7ULP System Clock Generation (SCG) modules
14 Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
28 The System Clock Generation (SCG) is responsible for clock generation
29 and distribution across this device. Functions performed by the SCG
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| H A D | imx7ulp-pcc-clock.yaml | 14 Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 1067 clk_debug("%s: system clock selected as %s\n", "[SCG]", in scg_a7_sys_clk_sel()
1086 debug("SCG Version: 0x%x\n", readl(&scg1_regs->verid)); in scg_a7_info()
1087 debug("SCG Parameter: 0x%x\n", readl(&scg1_regs->param)); in scg_a7_info()
1088 debug("SCG RCCR Value: 0x%x\n", readl(&scg1_regs->rccr)); in scg_a7_info()
1089 debug("SCG Clock Status: 0x%x\n", readl(&scg1_regs->csr)); in scg_a7_info()
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| H A D | Makefile | 8 obj-y := soc.o clock.o iomux.o pcc.o scg.o
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| H A D | pcc.c | 251 clk_debug("pcc_clock_get_clksrc: parent scg clk %d\n", *src); in pcc_clock_get_clksrc()
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| /OK3568_Linux_fs/kernel/arch/parisc/kernel/ |
| H A D | hardware.c | 780 {HPHW_FIO, 0x016, 0x00077, 0x0, "Lego 24 SCG Graphics"},
781 {HPHW_FIO, 0x017, 0x00077, 0x0, "Lego 24Z SCG Graphics"},
782 {HPHW_FIO, 0x018, 0x00077, 0x0, "Lego 48Z SCG Graphics"},
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| /OK3568_Linux_fs/buildroot/dl/uboot-tools/ |
| HD | u-boot-2021.07.tar.bz2 | pax_global_header
u-boot-2021.07/
u-boot-2021.07/.azure-pipelines.yml
... |
| /OK3568_Linux_fs/device/rockchip/common/images/userdata/userdata_normal/media/ |
| H A D | yuv420_p352x288.yuv | 1580 …+-.++-,..------.-+,.-/86/)$%'$ #&" # $ "/16BNORXPC=2;Scg[G6+&$$%$!!#!#"" #…
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4463 …:>>=<974467655653462251144) ��t~~�����}ztict���������������}z���sCG|yry}�������~}{vutp…
|