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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/marvell/
H A Darmada-380-mpcore-soc-ctrl.txt1 Marvell Armada 38x CA9 MPcore SoC Controller
6 - compatible: Should be "marvell,armada-380-mpcore-soc-ctrl".
9 datasheet for the CA9 MPcore SoC Control registers
11 mpcore-soc-ctrl@20d20 {
12 compatible = "marvell,armada-380-mpcore-soc-ctrl";
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/
H A Dscu.txt3 As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
9 - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual
11 - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual
13 - ARM11 MPCore: see DDI0360F ARM 11 MPCore Processor Technical Reference
H A Darm,realview.yaml15 the earlier CPUs such as TrustZone and multicore (MPCore).
32 - description: ARM RealView Platform Baseboard for ARM 11 MPCore
34 multiprocessing with ARM11 using MPCore using symmetric
H A Darm,vexpress-juno.yaml46 in MPCore configuration in a test chip on the core tile. See ARM
58 cores in a MPCore configuration in a test chip on the core tile. See
71 CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration
/OK3568_Linux_fs/kernel/arch/arm/mach-cns3xxx/
H A DKconfig15 Include support for the Cavium Networks CNS3420 MPCore Platform
17 This is a platform with an on-board ARM11 MPCore and has support
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Darm-realview-eb-a9mp.dts27 model = "ARM RealView EB Cortex A9 MPCore";
30 * This is the Cortex A9 MPCore tile used with the
H A Darm-realview-eb-11mp.dts31 * This is the ARM11 MPCore tile (HBI-0146) used with the RealView EB.
35 * qemu-system-arm -M realview-eb-mpcore -smp cpus=4
H A Darm-realview-eb-mp.dtsi28 * This is the common include file for all MPCore variants of the
30 * and Cortex-A9 MPCore.
H A Darm-realview-eb-a9mp-bbrevd.dts27 model = "ARM RealView EB Baseboard Rev D Cortex A9 MPCore";
H A Dxenvm-4.2.dts6 * Cortex-A15 MPCore (V2P-CA15)
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/video/
H A Dtegra20-dc.txt44 interrupts = <0 65 0x04 /* mpcore syncpt */
45 0 67 0x04>; /* mpcore general */
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/
H A Dmacro.h88 cmp \xreg, #0xD04 /* Cortex-A35 MPCore processor. */
99 cmp \xreg, #0xD07 /* Cortex-A57 MPCore processor. */
110 cmp \xreg, #0xD03 /* Cortex-A53 MPCore processor. */
/OK3568_Linux_fs/kernel/arch/arm/mach-tango/
H A DKconfig5 # Cortex-A9 MPCore r3p0, PL310 r3p2
/OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/arm32/
H A Dtimer.c10 #include "arm-mpcore.h"
H A Dpsci.c20 #include "arm-mpcore.h"
/OK3568_Linux_fs/buildroot/arch/
H A DConfig.in.arm172 bool "mpcore"
660 MPCore).
862 default "mpcore" if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra/
H A Dap.h24 #define PG_UP_TAG_0_PID_CPU 0x55555555 /* CPU aka "a9" aka "mpcore" */
/OK3568_Linux_fs/kernel/arch/arm/mach-shmobile/
H A Dsetup-r8a7779.c19 /* 2M identity mapping for 0xf0000000 (MPCORE) */
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/
H A Dcpu.h35 #define PG_UP_TAG_0_PID_CPU 0x55555555 /* CPU aka "a9" aka "mpcore" */
/OK3568_Linux_fs/kernel/Documentation/arm/keystone/
H A Doverview.rst7 Keystone range of SoCs are based on ARM Cortex-A15 MPCore Processors
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/gpu/
H A Dnvidia,tegra20-host1x.txt245 interrupts = <0 65 0x04 /* mpcore syncpt */
246 0 67 0x04>; /* mpcore general */
/OK3568_Linux_fs/kernel/arch/arm/oprofile/
H A Dcommon.c41 { "armv6_11mpcore", "arm/mpcore" },
/OK3568_Linux_fs/u-boot/board/freescale/ls1021atwr/
H A DREADME28 - ARM Cortex-A7 MPCore compliant with ARMv7-A architecture
/OK3568_Linux_fs/kernel/arch/arm/mach-mvebu/
H A Dpmsu.c82 /* CA9 MPcore SoC Control registers */
445 "marvell,armada-380-mpcore-soc-ctrl"); in armada_38x_cpuidle_init()
/OK3568_Linux_fs/u-boot/board/freescale/ls1021aqds/
H A DREADME28 - ARM Cortex-A7 MPCore compliant with ARMv7-A architecture

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