Home
last modified time | relevance | path

Searched full:mhz (Results 1 – 25 of 4459) sorted by relevance

12345678910>>...179

/OK3568_Linux_fs/kernel/drivers/clk/spear/
H A Dspear1340_clock.c167 /* PCLK 24MHz */
168 {.mode = 0, .m = 0x83, .n = 0x04, .p = 0x5}, /* vco 1572, pll 49.125 MHz */
169 {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x3}, /* vco 1000, pll 125 MHz */
170 {.mode = 0, .m = 0x64, .n = 0x06, .p = 0x1}, /* vco 800, pll 400 MHz */
171 {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x1}, /* vco 1000, pll 500 MHz */
172 {.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x1}, /* vco 1328, pll 664 MHz */
173 {.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x1}, /* vco 1600, pll 800 MHz */
175 {.mode = 0, .m = 0x96, .n = 0x06, .p = 0x0}, /* vco 1200, pll 1200 MHz */
180 {.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x2}, /* vco 1000, pll 250 MHz */
181 {.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x2}, /* vco 1328, pll 332 MHz */
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/
H A Dbcmwifi_channels.c51 /* Definitions for D11AC capable (80MHz+) Chanspec type */
62 * channel number of the 20MHz channel,
63 * or primary 20 MHz channel of 40MHz, 80MHz, 160MHz, 80+80MHz,
64 * 240MHz, 320MHz, or 160+160MHz channels.
68 * 'u' or 'l' (only for 2.4GHz band 40MHz)
70 * For 2.4GHz band 40MHz channels, the same primary channel may be the
71 * upper sideband for one 40MHz channel, and the lower sideband for an
72 * overlapping 40MHz channel. The {u: upper, l: lower} primary sideband
73 * indication disambiguates which 40MHz channel is being specified.
75 * For 40MHz in the 5GHz or 6GHz band and all channel bandwidths greater than
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/
H A Dbcmwifi_channels.c51 /* Definitions for D11AC capable (80MHz+) Chanspec type */
62 * channel number of the 20MHz channel,
63 * or primary 20 MHz channel of 40MHz, 80MHz, 160MHz, 80+80MHz,
64 * 240MHz, 320MHz, or 160+160MHz channels.
68 * 'u' or 'l' (only for 2.4GHz band 40MHz)
70 * For 2.4GHz band 40MHz channels, the same primary channel may be the
71 * upper sideband for one 40MHz channel, and the lower sideband for an
72 * overlapping 40MHz channel. The {u: upper, l: lower} primary sideband
73 * indication disambiguates which 40MHz channel is being specified.
75 * For 40MHz in the 5GHz or 6GHz band and all channel bandwidths greater than
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/vt6655/
H A Drf.c57 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
58 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
59 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
60 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
61 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
62 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
63 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
64 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
65 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
66 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/include/
H A Dbcmwifi_channels.h29 /* A chanspec holds the channel number, band, bandwidth and primary 20MHz sub-band */
40 #define CH_5MHZ_APART 1u /* 2G band channels are 5 Mhz apart */
41 #define CH_160MHZ_APART (32u * CH_5MHZ_APART) /* 32 5Mhz-spaces */
45 #define CH_MIN_2G_40M_CHANNEL 3u /* Min 40MHz center channel in 2G band */
46 #define CH_MAX_2G_40M_CHANNEL 11u /* Max 40MHz center channel in 2G band */
48 #define CH_MIN_6G_CHANNEL 1u /* Min 20MHz channel in 6G band */
49 #define CH_MAX_6G_CHANNEL 253u /* Max 20MHz channel in 6G band */
50 #define CH_MIN_6G_40M_CHANNEL 3u /* Min 40MHz center channel in 6G band */
51 #define CH_MAX_6G_40M_CHANNEL 227u /* Max 40MHz center channel in 6G band */
52 #define CH_MIN_6G_80M_CHANNEL 7u /* Min 80MHz center channel in 6G band */
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/include/
H A Dbcmwifi_channels.h29 /* A chanspec holds the channel number, band, bandwidth and primary 20MHz sub-band */
40 #define CH_5MHZ_APART 1u /* 2G band channels are 5 Mhz apart */
41 #define CH_160MHZ_APART (32u * CH_5MHZ_APART) /* 32 5Mhz-spaces */
45 #define CH_MIN_2G_40M_CHANNEL 3u /* Min 40MHz center channel in 2G band */
46 #define CH_MAX_2G_40M_CHANNEL 11u /* Max 40MHz center channel in 2G band */
48 #define CH_MIN_6G_CHANNEL 1u /* Min 20MHz channel in 6G band */
49 #define CH_MAX_6G_CHANNEL 253u /* Max 20MHz channel in 6G band */
50 #define CH_MIN_6G_40M_CHANNEL 3u /* Min 40MHz center channel in 6G band */
51 #define CH_MAX_6G_40M_CHANNEL 227u /* Max 40MHz center channel in 6G band */
52 #define CH_MIN_6G_80M_CHANNEL 7u /* Min 80MHz center channel in 6G band */
[all …]
/OK3568_Linux_fs/external/xserver/hw/xfree86/common/
H A Dextramodes30 # 640x360 59.32 Hz (CVT 0.23M9-R) hsync: 22.19 kHz; pclk: 17.75 MHz
33 # 640x360 59.84 Hz (CVT 0.23M9) hsync: 22.50 kHz; pclk: 18.00 MHz
36 # 720x405 58.99 Hz (CVT 0.29M9-R) hsync: 24.72 kHz; pclk: 21.75 MHz
39 # 720x405 59.51 Hz (CVT 0.29M9) hsync: 25.11 kHz; pclk: 22.50 MHz
42 # 864x486 59.57 Hz (CVT 0.42M9-R) hsync: 29.79 kHz; pclk: 30.50 MHz
45 # 864x486 59.92 Hz (CVT 0.42M9) hsync: 30.32 kHz; pclk: 32.50 MHz
48 # 960x540 59.82 Hz (CVT 0.52M9-R) hsync: 33.26 kHz; pclk: 37.25 MHz
51 # 960x540 59.63 Hz (CVT 0.52M9) hsync: 33.51 kHz; pclk: 40.75 MHz
54 # 1024x576 59.82 Hz (CVT 0.59M9-R) hsync: 35.47 kHz; pclk: 42.00 MHz
57 # 1024x576 59.90 Hz (CVT 0.59M9) hsync: 35.88 kHz; pclk: 46.50 MHz
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-omap2/omap5/
H A Dhw_data.c33 {200, 2, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */
34 {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 13 MHz */
35 {1000, 20, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */
36 {375, 8, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
37 {400, 12, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */
38 {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 27 MHz */
39 {375, 17, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1} /* 38.4 MHz */
44 {250, 2, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */
45 {500, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */
46 {119, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */
[all …]
/OK3568_Linux_fs/kernel/Documentation/fb/
H A Dviafb.modes10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
77 # 640x480, 100 Hz, Non-Interlaced (43.163 MHz dotclock)
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
98 # 640x480, 120 Hz, Non-Interlaced (52.406 MHz dotclock)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/
H A Dbcmwifi_channels.c59 /* Definitions for D11AC capable (80MHz+) Chanspec type */
68 * channel number of the 5MHz, 10MHz, 20MHz channel,
69 * or primary channel of 40MHz, 80MHz, 160MHz, or 80+80MHz channel.
73 * (only for 2.4GHz band 40MHz) U for upper sideband primary, L for lower.
75 * For 2.4GHz band 40MHz channels, the same primary channel may be the
76 * upper sideband for one 40MHz channel, and the lower sideband for an
77 * overlapping 40MHz channel. The U/L disambiguates which 40MHz channel
80 * For 40MHz in the 5GHz band and all channel bandwidths greater than
81 * 40MHz, the U/L specificaion is not allowed since the channels are
88 * Specifies the center channel of the primary and secondary 80MHz band.
[all …]
H A Dbcmwifi_channels.h37 /* A chanspec holds the channel number, band, bandwidth and primary 20MHz sideband */
48 #define CH_5MHZ_APART 1 /* 2G band channels are 5 Mhz apart */
52 #define CH_MIN_2G_40M_CHANNEL 3u /* Min 40MHz center channel in 2G band */
53 #define CH_MAX_2G_40M_CHANNEL 11u /* Max 40MHz center channel in 2G band */
137 /* pass a 80MHz channel number (uint8) to get respective LL, UU, LU, UL */
219 /* pass a center channel and get channel offset from it by 10MHz */
227 /* pass a 160MHz center channel to get 20MHz subband channel numbers */
237 /* given an 80p80 channel, return the lower 80MHz sideband */
242 /* given an 80p80 channel, return the upper 80MHz sideband */
247 /* pass an 80P80 chanspec (not channel) to get 20MHz subnand channel numbers */
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/
H A Dbcmwifi_channels.c59 /* Definitions for D11AC capable (80MHz+) Chanspec type */
68 * channel number of the 5MHz, 10MHz, 20MHz channel,
69 * or primary channel of 40MHz, 80MHz, 160MHz, or 80+80MHz channel.
73 * (only for 2.4GHz band 40MHz) U for upper sideband primary, L for lower.
75 * For 2.4GHz band 40MHz channels, the same primary channel may be the
76 * upper sideband for one 40MHz channel, and the lower sideband for an
77 * overlapping 40MHz channel. The U/L disambiguates which 40MHz channel
80 * For 40MHz in the 5GHz band and all channel bandwidths greater than
81 * 40MHz, the U/L specificaion is not allowed since the channels are
88 * Specifies the center channel of the primary and secondary 80MHz band.
[all …]
H A Dbcmwifi_channels.h37 /* A chanspec holds the channel number, band, bandwidth and primary 20MHz sideband */
48 #define CH_5MHZ_APART 1 /* 2G band channels are 5 Mhz apart */
52 #define CH_MIN_2G_40M_CHANNEL 3u /* Min 40MHz center channel in 2G band */
53 #define CH_MAX_2G_40M_CHANNEL 11u /* Max 40MHz center channel in 2G band */
137 /* pass a 80MHz channel number (uint8) to get respective LL, UU, LU, UL */
219 /* pass a center channel and get channel offset from it by 10MHz */
227 /* pass a 160MHz center channel to get 20MHz subband channel numbers */
237 /* given an 80p80 channel, return the lower 80MHz sideband */
242 /* given an 80p80 channel, return the upper 80MHz sideband */
247 /* pass an 80P80 chanspec (not channel) to get 20MHz subnand channel numbers */
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/infineon/
H A Dbcmwifi_channels.c59 /* Definitions for D11AC capable (80MHz+) Chanspec type */
68 * channel number of the 5MHz, 10MHz, 20MHz channel,
69 * or primary channel of 40MHz, 80MHz, 160MHz, or 80+80MHz channel.
73 * (only for 2.4GHz band 40MHz) U for upper sideband primary, L for lower.
75 * For 2.4GHz band 40MHz channels, the same primary channel may be the
76 * upper sideband for one 40MHz channel, and the lower sideband for an
77 * overlapping 40MHz channel. The U/L disambiguates which 40MHz channel
80 * For 40MHz in the 5GHz band and all channel bandwidths greater than
81 * 40MHz, the U/L specificaion is not allowed since the channels are
88 * Specifies the center channel of the primary and secondary 80MHz band.
[all …]
H A Dbcmwifi_channels.h37 /* A chanspec holds the channel number, band, bandwidth and primary 20MHz sideband */
48 #define CH_5MHZ_APART 1 /* 2G band channels are 5 Mhz apart */
52 #define CH_MIN_2G_40M_CHANNEL 3u /* Min 40MHz center channel in 2G band */
53 #define CH_MAX_2G_40M_CHANNEL 11u /* Max 40MHz center channel in 2G band */
134 /* pass a 80MHz channel number (uint8) to get respective LL, UU, LU, UL */
216 /* pass a center channel and get channel offset from it by 10MHz */
224 /* pass a 160MHz center channel to get 20MHz subband channel numbers */
234 /* given an 80p80 channel, return the lower 80MHz sideband */
239 /* given an 80p80 channel, return the upper 80MHz sideband */
244 /* pass an 80P80 chanspec (not channel) to get 20MHz subnand channel numbers */
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-omap2/omap4/
H A Dhw_data.c37 * dpll locked at 1400 MHz MPU clk at 700 MHz(OPP100) - DCC OFF
41 {175, 2, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */
42 {700, 12, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 13 MHz */
43 {125, 2, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */
44 {401, 10, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
45 {350, 12, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */
46 {700, 26, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 27 MHz */
47 {638, 34, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1} /* 38.4 MHz */
51 * dpll locked at 1600 MHz - MPU clk at 800 MHz(OPP Turbo 4430)
56 {200, 2, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_indep_power/
H A Dbcmwifi_channels.c65 * channel number of the 5MHz, 10MHz, 20MHz channel,
66 * or primary channel of 40MHz, 80MHz, 160MHz, or 80+80MHz channel.
70 * (only for 2.4GHz band 40MHz) U for upper sideband primary, L for lower.
72 * For 2.4GHz band 40MHz channels, the same primary channel may be the
73 * upper sideband for one 40MHz channel, and the lower sideband for an
74 * overlapping 40MHz channel. The U/L disambiguates which 40MHz channel
77 * For 40MHz in the 5GHz band and all channel bandwidths greater than
78 * 40MHz, the U/L specificaion is not allowed since the channels are
85 * Specifies the center channel of the first and second 80MHz band.
87 * In its simplest form, it is a 20MHz channel number, with the implied band
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-s3c2410.c123 PLL_S3C2410_MPLL_RATE(12 * MHZ, 270000000, 127, 1, 1),
124 PLL_S3C2410_MPLL_RATE(12 * MHZ, 268000000, 126, 1, 1),
125 PLL_S3C2410_MPLL_RATE(12 * MHZ, 266000000, 125, 1, 1),
126 PLL_S3C2410_MPLL_RATE(12 * MHZ, 226000000, 105, 1, 1),
127 PLL_S3C2410_MPLL_RATE(12 * MHZ, 210000000, 132, 2, 1),
129 PLL_S3C2410_MPLL_RATE(12 * MHZ, 202800000, 161, 3, 1),
130 PLL_S3C2410_MPLL_RATE(12 * MHZ, 192000000, 88, 1, 1),
131 PLL_S3C2410_MPLL_RATE(12 * MHZ, 186000000, 85, 1, 1),
132 PLL_S3C2410_MPLL_RATE(12 * MHZ, 180000000, 82, 1, 1),
133 PLL_S3C2410_MPLL_RATE(12 * MHZ, 170000000, 77, 1, 1),
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/common/
H A Didt8t49n222a_serdes_clk.c65 debug("Only one refclk at 122.88MHz is not supported." in set_serdes_refclk()
66 " Please set both refclk1 & refclk2 to 122.88MHz" in set_serdes_refclk()
67 " or both not to 122.88MHz.\n"); in set_serdes_refclk()
74 debug("refclk1 should be 100MHZ, 122.88MHz, 125MHz" in set_serdes_refclk()
75 " or 156.25MHz.\n"); in set_serdes_refclk()
82 debug("refclk2 should be 100MHZ, 122.88MHz, 125MHz" in set_serdes_refclk()
83 " or 156.25MHz.\n"); in set_serdes_refclk()
93 * Refclk1 = 122.88MHz Refclk2 = 122.88MHz in set_serdes_refclk()
118 * Refclk1 = 100MHz Refclk2 = 125MHz in set_serdes_refclk()
126 * Refclk1 = 125MHz Refclk2 = 125MHz in set_serdes_refclk()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/
H A Dcpu.c56 { .n = 1000, .m = 13, .p = 0, .cpcon = 12 }, /* OSC: 13.0 MHz */
57 { .n = 625, .m = 12, .p = 0, .cpcon = 8 }, /* OSC: 19.2 MHz */
58 { .n = 1000, .m = 12, .p = 0, .cpcon = 12 }, /* OSC: 12.0 MHz */
59 { .n = 1000, .m = 26, .p = 0, .cpcon = 12 }, /* OSC: 26.0 MHz */
60 { .n = 0, .m = 0, .p = 0, .cpcon = 0 }, /* OSC: 38.4 MHz (N/A) */
61 { .n = 0, .m = 0, .p = 0, .cpcon = 0 }, /* OSC: 48.0 MHz (N/A) */
74 { .n = 923, .m = 10, .p = 0, .cpcon = 12 }, /* OSC: 13.0 MHz */
75 { .n = 750, .m = 12, .p = 0, .cpcon = 8 }, /* OSC: 19.2 MHz */
76 { .n = 600, .m = 6, .p = 0, .cpcon = 12 }, /* OSC: 12.0 MHz */
77 { .n = 600, .m = 13, .p = 0, .cpcon = 12 }, /* OSC: 26.0 MHz */
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3399-sched-energy.dtsi29 210 129 /* 408MHz */
30 308 184 /* 600MHz */
31 419 246 /* 816MHz */
32 518 335 /* 1008MHz */
33 617 428 /* 1200MHz */
34 728 573 /* 1416MHz */
35 827 724 /* 1608MHz */
36 925 900 /* 1800MHz */
37 1024 1108 /* 1992MHz */
67 210 129 /* 408MHz */
[all …]
/OK3568_Linux_fs/kernel/drivers/media/usb/dvb-usb-v2/
H A Daf9035.h81 16384000, /* 16.38 MHz */
82 20480000, /* 20.48 MHz */
83 36000000, /* 36.00 MHz */
84 30000000, /* 30.00 MHz */
85 26000000, /* 26.00 MHz */
86 28000000, /* 28.00 MHz */
87 32000000, /* 32.00 MHz */
88 34000000, /* 34.00 MHz */
89 24000000, /* 24.00 MHz */
90 22000000, /* 22.00 MHz */
[all …]
/OK3568_Linux_fs/kernel/arch/x86/kernel/
H A Dtsc_msr.c22 * The frequency numbers in the SDM are e.g. 83.3 MHz, which does not contain a
24 * use a 25 MHz crystal and Cherry Trail uses a 19.2 MHz crystal, the crystal
25 * is the source clk for a root PLL which outputs 1600 and 100 MHz. It is
31 * clock of 100 MHz plus a quotient which gets us as close to the frequency
33 * For the 83.3 MHz example from above this would give us 100 MHz * 5 / 6 =
34 * 83 and 1/3 MHz, which matches exactly what has been measured on actual hw.
80 * 000: 100 * 5 / 6 = 83.3333 MHz
81 * 001: 100 * 1 / 1 = 100.0000 MHz
82 * 010: 100 * 4 / 3 = 133.3333 MHz
83 * 011: 100 * 7 / 6 = 116.6667 MHz
[all …]
/OK3568_Linux_fs/u-boot/board/sunxi/
H A Ddram_timings_sun4i.h4 # if CONFIG_DRAM_CLK <= 360 /* DDR3-1066F @360MHz, timings: 6-5-5-14 */
10 # elif CONFIG_DRAM_CLK <= 384 /* DDR3-1066F @384MHz, timings: 6-6-6-15 */
16 # elif CONFIG_DRAM_CLK <= 396 /* DDR3-1066F @396MHz, timings: 6-6-6-15 */
22 # elif CONFIG_DRAM_CLK <= 408 /* DDR3-1066F @408MHz, timings: 7-6-6-16 */
28 # elif CONFIG_DRAM_CLK <= 432 /* DDR3-1066F @432MHz, timings: 7-6-6-17 */
34 # elif CONFIG_DRAM_CLK <= 456 /* DDR3-1066F @456MHz, timings: 7-6-6-18 */
40 # elif CONFIG_DRAM_CLK <= 468 /* DDR3-1066F @468MHz, timings: 7-7-7-18 */
46 # elif CONFIG_DRAM_CLK <= 480 /* DDR3-1066F @480MHz, timings: 7-7-7-18 */
52 # elif CONFIG_DRAM_CLK <= 504 /* DDR3-1066F @504MHz, timings: 7-7-7-19 */
58 # elif CONFIG_DRAM_CLK <= 528 /* DDR3-1066F @528MHz, timings: 7-7-7-20 */
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-omap2/omap3/
H A Dlowlevel_init.S208 /* 12MHz */
216 /* 13MHz */
224 /* 19.2MHz */
232 /* 26MHz */
240 /* 38.4MHz */
255 /* 12MHz */
263 /* 13MHz */
271 /* 19.2MHz */
279 /* 26MHz */
287 /* 38.4MHz */
[all …]

12345678910>>...179