1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/snps,dwmac.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare MAC Device Tree Bindings 8 9maintainers: 10 - Alexandre Torgue <alexandre.torgue@st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 13 14# Select every compatible, including the deprecated ones. This way, we 15# will be able to report a warning when we have that compatible, since 16# we will validate the node thanks to the select, but won't report it 17# as a valid value in the compatible property description 18select: 19 properties: 20 compatible: 21 contains: 22 enum: 23 - snps,dwmac 24 - snps,dwmac-3.50a 25 - snps,dwmac-3.610 26 - snps,dwmac-3.70a 27 - snps,dwmac-3.710 28 - snps,dwmac-4.00 29 - snps,dwmac-4.10a 30 - snps,dwmac-4.20a 31 - snps,dwxgmac 32 - snps,dwxgmac-2.10 33 34 # Deprecated 35 - st,spear600-gmac 36 37 required: 38 - compatible 39 40properties: 41 42 # We need to include all the compatibles from schemas that will 43 # include that schemas, otherwise compatible won't validate for 44 # those. 45 compatible: 46 contains: 47 enum: 48 - allwinner,sun7i-a20-gmac 49 - allwinner,sun8i-a83t-emac 50 - allwinner,sun8i-h3-emac 51 - allwinner,sun8i-r40-emac 52 - allwinner,sun8i-v3s-emac 53 - allwinner,sun50i-a64-emac 54 - amlogic,meson6-dwmac 55 - amlogic,meson8b-dwmac 56 - amlogic,meson8m2-dwmac 57 - amlogic,meson-gxbb-dwmac 58 - amlogic,meson-axg-dwmac 59 - rockchip,px30-gmac 60 - rockchip,rk3128-gmac 61 - rockchip,rk3228-gmac 62 - rockchip,rk3288-gmac 63 - rockchip,rk3328-gmac 64 - rockchip,rk3366-gmac 65 - rockchip,rk3368-gmac 66 - rockchip,rk3399-gmac 67 - rockchip,rv1108-gmac 68 - snps,dwmac 69 - snps,dwmac-3.50a 70 - snps,dwmac-3.610 71 - snps,dwmac-3.70a 72 - snps,dwmac-3.710 73 - snps,dwmac-4.00 74 - snps,dwmac-4.10a 75 - snps,dwmac-4.20a 76 - snps,dwxgmac 77 - snps,dwxgmac-2.10 78 79 reg: 80 minItems: 1 81 maxItems: 2 82 83 interrupts: 84 minItems: 1 85 maxItems: 3 86 items: 87 - description: Combined signal for various interrupt events 88 - description: The interrupt to manage the remote wake-up packet detection 89 - description: The interrupt that occurs when Rx exits the LPI state 90 91 interrupt-names: 92 minItems: 1 93 maxItems: 3 94 items: 95 - const: macirq 96 - const: eth_wake_irq 97 - const: eth_lpi 98 99 clocks: 100 minItems: 1 101 maxItems: 8 102 additionalItems: true 103 items: 104 - description: GMAC main clock 105 - description: Peripheral registers interface clock 106 - description: 107 PTP reference clock. This clock is used for programming the 108 Timestamp Addend Register. If not passed then the system 109 clock will be used and this is fine on some platforms. 110 111 clock-names: 112 minItems: 1 113 maxItems: 8 114 additionalItems: true 115 contains: 116 enum: 117 - stmmaceth 118 - pclk 119 - ptp_ref 120 121 resets: 122 maxItems: 1 123 description: 124 MAC Reset signal. 125 126 reset-names: 127 const: stmmaceth 128 129 mac-mode: 130 $ref: ethernet-controller.yaml#/properties/phy-connection-type 131 description: 132 The property is identical to 'phy-mode', and assumes that there is mode 133 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter 134 can be passive (no SW requirement), and requires that the MAC operate 135 in a different mode than the PHY in order to function. 136 137 snps,axi-config: 138 $ref: /schemas/types.yaml#definitions/phandle 139 description: 140 AXI BUS Mode parameters. Phandle to a node that can contain the 141 following properties 142 * snps,lpi_en, enable Low Power Interface 143 * snps,xit_frm, unlock on WoL 144 * snps,wr_osr_lmt, max write outstanding req. limit 145 * snps,rd_osr_lmt, max read outstanding req. limit 146 * snps,kbbe, do not cross 1KiB boundary. 147 * snps,blen, this is a vector of supported burst length. 148 * snps,fb, fixed-burst 149 * snps,mb, mixed-burst 150 * snps,rb, rebuild INCRx Burst 151 152 snps,mtl-rx-config: 153 $ref: /schemas/types.yaml#definitions/phandle 154 description: 155 Multiple RX Queues parameters. Phandle to a node that can 156 contain the following properties 157 * snps,rx-queues-to-use, number of RX queues to be used in the 158 driver 159 * Choose one of these RX scheduling algorithms 160 * snps,rx-sched-sp, Strict priority 161 * snps,rx-sched-wsp, Weighted Strict priority 162 * For each RX queue 163 * Choose one of these modes 164 * snps,dcb-algorithm, Queue to be enabled as DCB 165 * snps,avb-algorithm, Queue to be enabled as AVB 166 * snps,map-to-dma-channel, Channel to map 167 * Specifiy specific packet routing 168 * snps,route-avcp, AV Untagged Control packets 169 * snps,route-ptp, PTP Packets 170 * snps,route-dcbcp, DCB Control Packets 171 * snps,route-up, Untagged Packets 172 * snps,route-multi-broad, Multicast & Broadcast Packets 173 * snps,priority, RX queue priority (Range 0x0 to 0xF) 174 175 snps,mtl-tx-config: 176 $ref: /schemas/types.yaml#definitions/phandle 177 description: 178 Multiple TX Queues parameters. Phandle to a node that can 179 contain the following properties 180 * snps,tx-queues-to-use, number of TX queues to be used in the 181 driver 182 * Choose one of these TX scheduling algorithms 183 * snps,tx-sched-wrr, Weighted Round Robin 184 * snps,tx-sched-wfq, Weighted Fair Queuing 185 * snps,tx-sched-dwrr, Deficit Weighted Round Robin 186 * snps,tx-sched-sp, Strict priority 187 * For each TX queue 188 * snps,weight, TX queue weight (if using a DCB weight 189 algorithm) 190 * Choose one of these modes 191 * snps,dcb-algorithm, TX queue will be working in DCB 192 * snps,avb-algorithm, TX queue will be working in AVB 193 [Attention] Queue 0 is reserved for legacy traffic 194 and so no AVB is available in this queue. 195 * Configure Credit Base Shaper (if AVB Mode selected) 196 * snps,send_slope, enable Low Power Interface 197 * snps,idle_slope, unlock on WoL 198 * snps,high_credit, max write outstanding req. limit 199 * snps,low_credit, max read outstanding req. limit 200 * snps,priority, TX queue priority (Range 0x0 to 0xF) 201 202 snps,reset-gpio: 203 deprecated: true 204 maxItems: 1 205 description: 206 PHY Reset GPIO 207 208 snps,reset-active-low: 209 deprecated: true 210 $ref: /schemas/types.yaml#definitions/flag 211 description: 212 Indicates that the PHY Reset is active low 213 214 snps,reset-delays-us: 215 deprecated: true 216 description: 217 Triplet of delays. The 1st cell is reset pre-delay in micro 218 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd 219 cell is reset post-delay in micro seconds. 220 $ref: /schemas/types.yaml#definitions/uint32-array 221 minItems: 3 222 maxItems: 3 223 224 snps,aal: 225 $ref: /schemas/types.yaml#definitions/flag 226 description: 227 Use Address-Aligned Beats 228 229 snps,fixed-burst: 230 $ref: /schemas/types.yaml#definitions/flag 231 description: 232 Program the DMA to use the fixed burst mode 233 234 snps,mixed-burst: 235 $ref: /schemas/types.yaml#definitions/flag 236 description: 237 Program the DMA to use the mixed burst mode 238 239 snps,force_thresh_dma_mode: 240 $ref: /schemas/types.yaml#definitions/flag 241 description: 242 Force DMA to use the threshold mode for both tx and rx 243 244 snps,force_sf_dma_mode: 245 $ref: /schemas/types.yaml#definitions/flag 246 description: 247 Force DMA to use the Store and Forward mode for both tx and 248 rx. This flag is ignored if force_thresh_dma_mode is set. 249 250 snps,en-tx-lpi-clockgating: 251 $ref: /schemas/types.yaml#definitions/flag 252 description: 253 Enable gating of the MAC TX clock during TX low-power mode 254 255 snps,multicast-filter-bins: 256 $ref: /schemas/types.yaml#definitions/uint32 257 description: 258 Number of multicast filter hash bins supported by this device 259 instance 260 261 snps,perfect-filter-entries: 262 $ref: /schemas/types.yaml#definitions/uint32 263 description: 264 Number of perfect filter entries supported by this device 265 instance 266 267 snps,ps-speed: 268 $ref: /schemas/types.yaml#definitions/uint32 269 description: 270 Port selection speed that can be passed to the core when PCS 271 is supported. For example, this is used in case of SGMII and 272 MAC2MAC connection. 273 274 snps,flow-ctrl: 275 $ref: /schemas/types.yaml#definitions/uint32 276 description: 277 Disable or enable flow control for controller. 278 279 mdio: 280 type: object 281 description: 282 Creates and registers an MDIO bus. 283 284 properties: 285 compatible: 286 const: snps,dwmac-mdio 287 288 required: 289 - compatible 290 291required: 292 - compatible 293 - reg 294 - interrupts 295 - interrupt-names 296 - phy-mode 297 298dependencies: 299 snps,reset-active-low: ["snps,reset-gpio"] 300 snps,reset-delay-us: ["snps,reset-gpio"] 301 302allOf: 303 - $ref: "ethernet-controller.yaml#" 304 - if: 305 properties: 306 compatible: 307 contains: 308 enum: 309 - allwinner,sun7i-a20-gmac 310 - allwinner,sun8i-a83t-emac 311 - allwinner,sun8i-h3-emac 312 - allwinner,sun8i-r40-emac 313 - allwinner,sun8i-v3s-emac 314 - allwinner,sun50i-a64-emac 315 - snps,dwxgmac 316 - snps,dwxgmac-2.10 317 - st,spear600-gmac 318 319 then: 320 properties: 321 snps,pbl: 322 description: 323 Programmable Burst Length (tx and rx) 324 $ref: /schemas/types.yaml#definitions/uint32 325 enum: [2, 4, 8] 326 327 snps,txpbl: 328 description: 329 Tx Programmable Burst Length. If set, DMA tx will use this 330 value rather than snps,pbl. 331 $ref: /schemas/types.yaml#definitions/uint32 332 enum: [2, 4, 8] 333 334 snps,rxpbl: 335 description: 336 Rx Programmable Burst Length. If set, DMA rx will use this 337 value rather than snps,pbl. 338 $ref: /schemas/types.yaml#definitions/uint32 339 enum: [2, 4, 8] 340 341 snps,no-pbl-x8: 342 $ref: /schemas/types.yaml#definitions/flag 343 description: 344 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core 345 rev < 3.50, don\'t multiply the values by 4. 346 347 - if: 348 properties: 349 compatible: 350 contains: 351 enum: 352 - allwinner,sun7i-a20-gmac 353 - allwinner,sun8i-a83t-emac 354 - allwinner,sun8i-h3-emac 355 - allwinner,sun8i-r40-emac 356 - allwinner,sun8i-v3s-emac 357 - allwinner,sun50i-a64-emac 358 - snps,dwmac-4.00 359 - snps,dwmac-4.10a 360 - snps,dwmac-4.20a 361 - snps,dwxgmac 362 - snps,dwxgmac-2.10 363 - st,spear600-gmac 364 365 then: 366 properties: 367 snps,tso: 368 $ref: /schemas/types.yaml#definitions/flag 369 description: 370 Enables the TSO feature otherwise it will be managed by 371 MAC HW capability register. 372 373additionalProperties: true 374 375examples: 376 - | 377 stmmac_axi_setup: stmmac-axi-config { 378 snps,wr_osr_lmt = <0xf>; 379 snps,rd_osr_lmt = <0xf>; 380 snps,blen = <256 128 64 32 0 0 0>; 381 }; 382 383 mtl_rx_setup: rx-queues-config { 384 snps,rx-queues-to-use = <1>; 385 snps,rx-sched-sp; 386 queue0 { 387 snps,dcb-algorithm; 388 snps,map-to-dma-channel = <0x0>; 389 snps,priority = <0x0>; 390 }; 391 }; 392 393 mtl_tx_setup: tx-queues-config { 394 snps,tx-queues-to-use = <2>; 395 snps,tx-sched-wrr; 396 queue0 { 397 snps,weight = <0x10>; 398 snps,dcb-algorithm; 399 snps,priority = <0x0>; 400 }; 401 402 queue1 { 403 snps,avb-algorithm; 404 snps,send_slope = <0x1000>; 405 snps,idle_slope = <0x1000>; 406 snps,high_credit = <0x3E800>; 407 snps,low_credit = <0xFFC18000>; 408 snps,priority = <0x1>; 409 }; 410 }; 411 412 gmac0: ethernet@e0800000 { 413 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac"; 414 reg = <0xe0800000 0x8000>; 415 interrupt-parent = <&vic1>; 416 interrupts = <24 23 22>; 417 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; 418 mac-address = [000000000000]; /* Filled in by U-Boot */ 419 max-frame-size = <3800>; 420 phy-mode = "gmii"; 421 snps,multicast-filter-bins = <256>; 422 snps,perfect-filter-entries = <128>; 423 rx-fifo-depth = <16384>; 424 tx-fifo-depth = <16384>; 425 clocks = <&clock>; 426 clock-names = "stmmaceth"; 427 snps,axi-config = <&stmmac_axi_setup>; 428 snps,mtl-rx-config = <&mtl_rx_setup>; 429 snps,mtl-tx-config = <&mtl_tx_setup>; 430 mdio0 { 431 #address-cells = <1>; 432 #size-cells = <0>; 433 compatible = "snps,dwmac-mdio"; 434 phy1: ethernet-phy@0 { 435 reg = <0>; 436 }; 437 }; 438 }; 439 440# FIXME: We should set it, but it would report all the generic 441# properties as additional properties. 442# additionalProperties: false 443 444... 445