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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/ddr/
H A Dlpddr2.txt1 * LPDDR2 SDRAM memories compliant to JEDEC JESD209-2
4 - compatible : Should be one of - "jedec,lpddr2-nvm", "jedec,lpddr2-s2",
5 "jedec,lpddr2-s4"
7 "ti,jedec-lpddr2-s2" should be listed if the memory part is LPDDR2-S2 type
9 "ti,jedec-lpddr2-s4" should be listed if the memory part is LPDDR2-S4 type
11 "ti,jedec-lpddr2-nvm" should be listed if the memory part is LPDDR2-NVM type
35 - The lpddr2 node may have one or more child nodes of type "lpddr2-timings".
36 "lpddr2-timings" provides AC timing parameters of the device for
39 bindings/ddr/lpddr2-timings.txt for more information on "lpddr2-timings"
43 elpida_ECB240ABACN : lpddr2 {
[all …]
H A Dlpddr2-timings.txt1 * AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin
4 - compatible : Should be "jedec,lpddr2-timings"
33 timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
34 compatible = "jedec,lpddr2-timings";
H A Dlpddr3-timings.txt3 The structures are based on LPDDR2 and extended where needed.
/OK3568_Linux_fs/tools/windows/
HDDDR_UserTool_v1.41.zip ... DDR_UserTool_v1.41/测试文件/RK3066_RK3066A/1GB LPDDR2(用2个CS每个CS由1片128M×32bit组成)焊接检测.cfg DDR_UserTool_v1. ...
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Delpida_ecb240abacn.dtsi7 elpida_ECB240ABACN: lpddr2 {
8 compatible = "Elpida,ECB240ABACN","jedec,lpddr2-s4";
24 timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
25 compatible = "jedec,lpddr2-timings";
46 timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 {
47 compatible = "jedec,lpddr2-timings";
H A Drk322x-dram-default-timing.dtsi25 /* lpddr2 not supported odt */
/OK3568_Linux_fs/kernel/drivers/mtd/lpddr/
H A Dlpddr2_nvm.c3 * LPDDR2-NVM MTD driver. This module provides read, write, erase, lock/unlock
4 * support for LPDDR2-NVM PCM memories
54 /* LPDDR2-NVM Commands */
63 /* LPDDR2-NVM Registers offset */
131 * Enable lpddr2-nvm Overlay Window
132 * Overlay Window is a memory mapped area containing all LPDDR2-NVM registers
146 * Disable lpddr2-nvm Overlay Window
147 * Overlay Window is a memory mapped area containing all LPDDR2-NVM registers
161 * Execute lpddr2-nvm operations
231 * Execute lpddr2-nvm operations @ block level
[all …]
H A DKconfig2 menu "LPDDR & LPDDR2 PCM memory drivers"
25 tristate "Support for LPDDR2-NVM flash chips"
27 This option enables support of PCM memories with a LPDDR2-NVM
/OK3568_Linux_fs/kernel/Documentation/driver-api/memory-devices/
H A Dti-emif.rst30 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
31 This driver takes care of only LPDDR2 memories presently. The
63 - mr4 : last polled value of MR4 register in the LPDDR2 device. MR4
/OK3568_Linux_fs/kernel/include/linux/platform_data/
H A Demif_plat.h46 * @type: Device type (LPDDR2-S4, LPDDR2-S2 etc)
80 * @temp_alert_poll_interval_ms: LPDDR2 MR4 polling interval at nominal
/OK3568_Linux_fs/kernel/drivers/memory/
H A Djedec_ddr.h96 * LPDDR2 related defines
123 * Structure for timings from the LPDDR2 datasheet
174 * Structure for timings for LPDDR3 based on LPDDR2 plus additional fields.
H A Djedec_ddr_data.c14 /* LPDDR2 addressing details from JESD209-2 section 2.4 */
30 /* LPDDR2 AC timing parameters from JESD209-2 section 12 */
H A DKconfig99 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
100 This driver takes care of only LPDDR2 memories presently. The
/OK3568_Linux_fs/kernel/drivers/soc/atmel/
H A Dsoc.c97 "sama5d27c 128MiB LPDDR2 SiP", "sama5d2"),
99 "sama5d27c 256MiB LPDDR2 SiP", "sama5d2"),
107 "sama5d28c 128MiB LPDDR2 SiP", "sama5d2"),
109 "sama5d28c 256MiB LPDDR2 SiP", "sama5d2"),
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx6/
H A Dmx6-ddr.h380 /* Device Information: Varies per LPDDR2 part number and speed grade */
382 u16 mem_speed; /* ie 800 for LPDDR2-800 */
410 u8 ddr_type; /* DDR type: DDR3(0) or LPDDR2(1) */
440 /* lpddr2 zq hw calibration */
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/ti/
H A Demif.txt5 DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
24 - device-handle : phandle to a "lpddr2" node representing the memory part
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx6/
H A Dddr.c893 * - ddr3/lpddr2 chip details
900 * 2. i.Mx6SL LPDDR2 Script Aid spreadsheet V0.04 designed to generate MMDC
916 * According JESD209-2B-LPDDR2: Table 103
942 * According JESD209-2B-LPDDR2: Table 103
996 /* LPDDR2-S2 and LPDDR2-S4 have the same tRFC value. */ in mx6_lpddr2_cfg()
1016 * txpdll, txpr, taonpd and taofpd are not relevant in LPDDR2 mode, in mx6_lpddr2_cfg()
1026 /* tckesr for LPDDR2 */ in mx6_lpddr2_cfg()
1036 /* LPDDR2 mode use tRCD_LP filed in MDCFG3. */ in mx6_lpddr2_cfg()
1042 /* To LPDDR2, CL in MDCFG0 refers to RL */ in mx6_lpddr2_cfg()
1104 * In LPDDR2 mode this register should be cleared, in mx6_lpddr2_cfg()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dlpddr2.h10 /* definitions for LPDDR2 PAD values */
45 …E 0x00001688 /* WALAT=0, BI bank interleave on, LPDDR2_S2=0, MIF3=3, RALAT=2, 8 banks, LPDDR2 */
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_rk3036.h316 * 100: lpddr2-s2
317 * 101: lpddr2-s4
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_common.c22 case LPDDR2: in sdram_print_dram_type()
23 printascii("LPDDR2"); in sdram_print_dram_type()
314 /* detect dbw for ddr3,lpddr2,lpddr3,lpddr4 */
327 } else if (dram_type == LPDDR3 || dram_type == LPDDR2) { in sdram_detect_dbw()
H A DKconfig32 3 for DDR3, 5 for LPDDR2, 6 for LPDDR3, 7 for LPDDR4, all other
H A Dsdram-px30-lpddr2-detect-333.inc28 .dramtype = LPDDR2,
/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c495 * LPDDR2 and/or LPDDR3 require a 200us minimum delay in mctl_channel_init()
526 * rd2wr = RL + BL/2 + RU(tDQSCKmax/tCK) + 1 - WL (for LPDDR2/LPDDR3) in mctl_channel_init()
547 * this is only relevant for LPDDR2/LPDDR3 in mctl_channel_init()
558 /* These timings are relevant for LPDDR2/LPDDR3 only */ in mctl_channel_init()
631 /* For LPDDR2 or LPDDR3, set DQSGX to 0 before training. */ in mctl_channel_init()
656 /* tDQSCK and tDQSCKmax are used LPDDR2/LPDDR3 */ in mctl_channel_init()
676 /* LPDDR2 or LPDDR3 */ in mctl_channel_init()
771 * LPDDR2 and LPDDR3 * in mctl_channel_init()
/OK3568_Linux_fs/u-boot/board/freescale/mx6slevk/
H A Dmx6slevk.c456 .rtt_wr = 0, /* LPDDR2 does not need rtt_wr rtt_nom */ in spl_dram_init()
458 .sde_to_rst = 0, /* LPDDR2 does not need this field */ in spl_dram_init()
459 .rst_to_cke = 0x10, /* JEDEC value for LPDDR2: 200us */ in spl_dram_init()
/OK3568_Linux_fs/u-boot/board/freescale/s32v234evb/
H A DMakefile8 obj-y += lpddr2.o

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