Searched full:lpass (Results 1 – 25 of 46) sorted by relevance
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27 /* LPASS Top register definitions */53 /* pointer to the LPASS TOP regmap */58 static void exynos_lpass_core_sw_reset(struct exynos_lpass *lpass, int mask) in exynos_lpass_core_sw_reset() argument62 regmap_read(lpass->top, SFR_LPASS_CORE_SW_RESET, &val); in exynos_lpass_core_sw_reset()65 regmap_write(lpass->top, SFR_LPASS_CORE_SW_RESET, val); in exynos_lpass_core_sw_reset()70 regmap_write(lpass->top, SFR_LPASS_CORE_SW_RESET, val); in exynos_lpass_core_sw_reset()73 static void exynos_lpass_enable(struct exynos_lpass *lpass) in exynos_lpass_enable() argument75 clk_prepare_enable(lpass->sfr0_clk); in exynos_lpass_enable()78 regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, in exynos_lpass_enable()81 regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, in exynos_lpass_enable()[all …]
3 snd-soc-lpass-cpu-objs := lpass-cpu.o4 snd-soc-lpass-hdmi-objs := lpass-hdmi.o5 snd-soc-lpass-platform-objs := lpass-platform.o6 snd-soc-lpass-ipq806x-objs := lpass-ipq806x.o7 snd-soc-lpass-apq8016-objs := lpass-apq8016.o8 snd-soc-lpass-sc7180-objs := lpass-sc7180.o10 obj-$(CONFIG_SND_SOC_LPASS_CPU) += snd-soc-lpass-cpu.o11 obj-$(CONFIG_SND_SOC_LPASS_HDMI) += snd-soc-lpass-hdmi.o12 obj-$(CONFIG_SND_SOC_LPASS_PLATFORM) += snd-soc-lpass-platform.o13 obj-$(CONFIG_SND_SOC_LPASS_IPQ806X) += snd-soc-lpass-ipq806x.o[all …]
5 * lpass-ipq806x.c -- ALSA SoC CPU DAI driver for QTi LPASS6 * Splited out the IPQ8064 soc specific from lpass-cpu.c20 #include "lpass-lpaif-reg.h"21 #include "lpass.h"40 .stream_name = "lpass-cpu-playback",165 { .compatible = "qcom,lpass-cpu", .data = &ipq806x_data },172 .name = "lpass-cpu",180 MODULE_DESCRIPTION("QTi LPASS CPU Driver");
5 * lpass-apq8016.c -- ALSA SoC CPU DAI driver for APQ8016 LPASS21 #include <dt-bindings/sound/apq8016-lpass.h>22 #include "lpass-lpaif-reg.h"23 #include "lpass.h"295 { .compatible = "qcom,lpass-cpu-apq8016", .data = &apq8016_data },302 .name = "apq8016-lpass-cpu",310 MODULE_DESCRIPTION("APQ8016 LPASS CPU Driver");
5 * lpass.h - Definitions for the QTi LPASS15 #include <dt-bindings/sound/qcom,lpass.h>16 #include "lpass-hdmi.h"58 /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */87 /* SOC specific variations in the LPASS IP integration */
5 * lpass-sc7180.c -- ALSA SoC platform-machine driver for QTi LPASS15 #include <dt-bindings/sound/sc7180-lpass.h>19 #include "lpass-lpaif-reg.h"20 #include "lpass.h"285 {.compatible = "qcom,sc7180-lpass-cpu", .data = &sc7180_data},292 .name = "sc7180-lpass-cpu",301 MODULE_DESCRIPTION("SC7180 LPASS CPU DRIVER");
5 * lpass-hdmi.c -- ALSA SoC HDMI-CPU DAI driver for QTi LPASS HDMI15 #include <dt-bindings/sound/sc7180-lpass.h>16 #include "lpass-lpaif-reg.h"17 #include "lpass.h"257 MODULE_DESCRIPTION("QTi LPASS HDMI Driver");
5 * lpass-platform.c -- ALSA SoC platform driver for QTi LPASS16 #include "lpass-lpaif-reg.h"17 #include "lpass.h"19 #define DRV_NAME "lpass-platform"859 drvdata->lpaif_irq = platform_get_irq_byname(pdev, "lpass-irq-lpaif"); in asoc_qcom_lpass_platform_register()873 "lpass-irq-lpaif", drvdata); in asoc_qcom_lpass_platform_register()888 drvdata->hdmiif_irq = platform_get_irq_byname(pdev, "lpass-irq-hdmi"); in asoc_qcom_lpass_platform_register()893 lpass_platform_hdmiif_irq, 0, "lpass-irq-hdmi", drvdata); in asoc_qcom_lpass_platform_register()918 MODULE_DESCRIPTION("QTi LPASS Platform Driver");
5 * lpass-cpu.c -- ALSA SoC CPU DAI driver for QTi LPASS19 #include "lpass-lpaif-reg.h"20 #include "lpass.h"301 * Ensure lpass BCLK/LRCLK is enabled during in lpass_cpu_daiops_trigger()334 * To ensure lpass BCLK/LRCLK is disabled during in lpass_cpu_daiops_trigger()365 * Ensure lpass BCLK/LRCLK is enabled bit before playback/capture in lpass_cpu_daiops_prepare()443 .name = "lpass-cpu",877 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-lpaif"); in asoc_qcom_lpass_cpu_platform_probe()899 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-hdmiif"); in asoc_qcom_lpass_cpu_platform_probe()996 MODULE_DESCRIPTION("QTi LPASS CPU Driver");
52 Support for Qualcomm Technologies LPASS audio block in113 Support for Qualcomm Technologies LPASS audio block in
4 $id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml#7 title: Qualcomm Technologies Inc. LPASS CPU dai driver bindings14 Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist15 of MI2S interface for audio data transfer on external codecs. LPASS cpu driver22 - qcom,lpass-cpu23 - qcom,apq8016-lpass-cpu24 - qcom,sc7180-lpass-cpu72 LPASS CPU dai node for each I2S device. Bindings of each node110 const: qcom,lpass-cpu124 const: qcom,apq8016-lpass-cpu[all …]
3 ## Bindings for codec core in lpass:7 - reg: address space for lpass codec.
79 sound-dai = <&lpass MI2S_PRIMARY>;90 sound-dai = <&lpass MI2S_QUATERNARY>;
143 tristate "IPQ806x LPASS Clock Controller"146 Support for the LPASS clock controller on ipq806x devices.189 tristate "APQ8064/MSM8960 LPASS Clock Controller"192 Support for the LPASS clock controller on apq8064/msm8960 devices.204 tristate "MDM9615 LPASS Clock Controller"207 Support for the LPASS clock controller on mdm9615 devices.312 tristate "SC7180 LPASS Core Clock Controller"315 Support for the LPASS(Low Power Audio Subsystem) core clock controller317 Say Y if you want to use LPASS clocks and power domains of the LPASS412 Support for the LPASS clock controller on SDM845 devices.[all …]
11 #include <dt-bindings/clock/qcom,lpass-sdm845.h>45 /* CLK_OFF would not toggle until LPASS is out of reset */59 /* CLK_OFF would not toggle until LPASS is out of reset */73 /* CLK_OFF would not toggle until LPASS is out of reset */
1 Samsung Exynos SoC Low Power Audio Subsystem (LPASS)5 - compatible : "samsung,exynos5433-lpass"6 - reg : should contain the LPASS top SFR region location17 an optional sub-node. For "samsung,exynos5433-lpass" compatible this includes:29 compatible = "samsung,exynos5433-lpass";
5 #include <dt-bindings/sound/qcom,lpass.h>7 /* NOTE: Use qcom,lpass.h to define any AIF ID's for LPASS */
7 title: Qualcomm LPASS Core Clock Controller Binding for SC718013 Qualcomm LPASS core clock control module which supports the clocks and47 - description: lpass core cc register48 - description: lpass audio cc register
1 Qualcomm LPASS Clock Controller Binding13 - reg-names : register names of LPASS domain18 The below node has to be defined in the cases where the LPASS peripheral loader
22 /* LPASS Core power domains */25 /* LPASS Audio power domains */
146 /* Assert the LPASS PDC Reset */ in qcom_adsp_shutdown()148 /* Place the LPASS processor into reset */ in qcom_adsp_shutdown()156 /* De-assert the LPASS PDC Reset */ in qcom_adsp_shutdown()158 /* Remove the LPASS reset */ in qcom_adsp_shutdown()516 .ssr_name = "lpass",
501 .ssr_name = "lpass",520 .ssr_name = "lpass",540 .ssr_name = "lpass",555 .ssr_name = "lpass",
11 #include <dt-bindings/sound/apq8016-lpass.h>300 &lpass {345 sound-dai = <&lpass MI2S_QUATERNARY>;355 sound-dai = <&lpass MI2S_PRIMARY>;365 sound-dai = <&lpass MI2S_TERTIARY>;
pax_global_header alsa-ucm-conf-1.2.6.3/ alsa-ucm-conf-1.2. ...