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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/exynos/
H A Dexynos5433-tmu.dtsi143 g3d_thermal: g3d-thermal {
148 g3d_alert_0: g3d-alert-0 {
153 g3d_alert_1: g3d-alert-1 {
158 g3d_alert_2: g3d-alert-2 {
163 g3d_alert_3: g3d-alert-3 {
168 g3d_alert_4: g3d-alert-4 {
173 g3d_alert_5: g3d-alert-5 {
178 g3d_alert_6: g3d-alert-6 {
H A Dexynos5433.dtsi421 compatible = "samsung,exynos5433-cmu-g3d";
598 label = "G3D";
/OK3568_Linux_fs/kernel/drivers/cpufreq/
H A Ds5pv210-cpufreq.c172 * ONEDRAM, MFC, G3D }
293 * 1. Temporary Change divider for MFC and G3D in s5pv210_target()
302 /* For MFC, G3D dividing */ in s5pv210_target()
308 * 2. Change SCLKA2M(200Mhz)to SCLKMPLL in MFC_MUX, G3D MUX in s5pv210_target()
394 * to SCLKA2M(200Mhz) in MFC_MUX and G3D MUX in s5pv210_target()
408 * 8. Change divider for MFC and G3D in s5pv210_target()
417 /* For MFC, G3D dividing */ in s5pv210_target()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/devfreq/
H A Dexynos-bus.txt61 |--- G3D
75 |--- G3D
93 |--- G3D
111 |--- G3D
150 |--- G3D
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dexynos5433-clock.txt10 which generates clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
31 - "samsung,exynos5433-cmu-g3d" - clock controller compatible for CMU_G3D
123 Input clocks for g3d clock controller:
353 compatible = "samsung,exynos5433-cmu-g3d";
H A Dexynos5260-clock.txt59 8) "samsung,exynos5260-clock-g3d"
119 Input clocks for g3d clock controller:
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dhi6220-domain-ctrl.yaml15 controller(e.g. codec, G3D ...) and the Power Management domain
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt2701-g3d.c90 .name = "clk-mt2701-g3d",
H A DMakefile29 obj-$(CONFIG_COMMON_CLK_MT2701_G3DSYS) += clk-mt2701-g3d.o
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/devfreq/event/
H A Dexynos-ppmu.txt8 usages of each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC).
/OK3568_Linux_fs/u-boot/board/samsung/trats/
H A Dtrats.c101 writel(0x0, &pwr->g3d_configuration); /* G3D */ in trats_low_power_mode()
109 writel(0x0, &clk->gate_ip_g3d); /* G3D */ in trats_low_power_mode()
H A Dsetup.h579 * GATE G3D : All block
/OK3568_Linux_fs/kernel/drivers/clk/hisilicon/
H A Dclk-hi3660-stub.c107 DEFINE_CLK_STUB(HI3660_CLK_STUB_GPU, 0x0003030A, "clk-g3d")
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-exynos5420.c1265 GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9,
1270 { GATE_IP_G3D, 0x3ff, 0x3ff }, /* G3D gates */
1351 .pd_name = "G3D",
1656 * Keep top part of G3D clock path enabled permanently to ensure in exynos5x_clk_init()
1658 * main G3D clock enablement status. in exynos5x_clk_init()
H A Dclk-s5pv210.c630 GATE(CLK_G3D, "g3d", "dout_hclkm", CLK_GATE_IP0, 8, 0, 0),
692 GATE(CLK_G3D, "g3d", "dout_hclkd", CLK_GATE_IP0, 8, 0, 0),
H A Dclk-exynos5250.c546 GATE(CLK_G3D, "g3d", "div_aclk400_g3d", GATE_IP_G3D, 0,
H A Dclk-exynos3250.c613 GATE(CLK_G3D, "g3d", "div_aclk_200", GATE_IP_G3D, 0, 0, 0),
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dexynos5260.dtsi129 compatible = "samsung,exynos5260-clock-g3d";
H A Dexynos3250.dtsi196 label = "G3D";
H A Dexynos4.dtsi125 label = "G3D";
H A Dexynos5250.dtsi203 label = "G3D";
H A Dexynos5420.dtsi375 label = "G3D";
/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/
H A Dexynos4_setup.h307 /* SCLK G3D */
/OK3568_Linux_fs/kernel/drivers/thermal/
H A Dhisi_thermal.c259 * 0x3: remote sensor 3 (G3D)
/OK3568_Linux_fs/kernel/drivers/devfreq/event/
H A Dexynos-ppmu.c56 PPMU_EVENT(g3d),

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