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/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun4i.c2 * sunxi DRAM controller initialization
6 * Based on sun4i Linux kernel sources mach-sunxi/pm/standby/dram*.c
18 * Unfortunately the only documentation we have on the sun7i DRAM
27 #include <asm/arch/dram.h>
55 * This performs the external DRAM reset by driving the RESET pin low and
61 struct sunxi_dram_reg *dram = in mctl_ddr3_reset() local
74 setbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
76 clrbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
80 clrbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
82 setbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
[all …]
H A DKconfig38 Select this for sunxi SoCs which uses a DRAM controller like the
40 not have official open-source DRAM initialization code, but can
41 use modified H3 DRAM initialization code.
47 Select this for sunxi SoCs with DesignWare DRAM controller and
53 Select this for sunxi SoCs with DesignWare DRAM controller with
237 prompt "DRAM Type and Timing"
268 int "sunxi dram type"
272 Set the dram type, 3: DDR3, 7: LPDDR3
275 int "sunxi dram clock speed"
283 Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
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/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_px30.c65 static void rkclk_ddr_reset(struct dram_info *dram, in rkclk_ddr_reset() argument
71 &dram->cru->softrst_con[1]); in rkclk_ddr_reset()
73 &dram->cru->softrst_con[2]); in rkclk_ddr_reset()
76 static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz) in rkclk_set_dpll() argument
104 writel(DPLL_MODE(CLOCK_FROM_XIN_OSC), &dram->cru->mode); in rkclk_set_dpll()
106 writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->pll[1].con0); in rkclk_set_dpll()
108 &dram->cru->pll[1].con1); in rkclk_set_dpll()
112 if (LOCK(readl(&dram->cru->pll[1].con1))) in rkclk_set_dpll()
117 writel(DPLL_MODE(CLOCK_FROM_PLL), &dram->cru->mode); in rkclk_set_dpll()
120 static void rkclk_configure_ddr(struct dram_info *dram, in rkclk_configure_ddr() argument
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H A Dsdram_rk3328.c67 static void rkclk_ddr_reset(struct dram_info *dram, in rkclk_ddr_reset() argument
73 &dram->cru->softrst_con[5]); in rkclk_ddr_reset()
74 writel(ddrctrl_asrstn_req(ctl_srstn), &dram->cru->softrst_con[9]); in rkclk_ddr_reset()
77 static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz) in rkclk_set_dpll() argument
105 writel(((0x1 << 4) << 16) | (0 << 4), &dram->cru->mode_con); in rkclk_set_dpll()
106 writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->dpll_con[0]); in rkclk_set_dpll()
108 &dram->cru->dpll_con[1]); in rkclk_set_dpll()
112 if (LOCK(readl(&dram->cru->dpll_con[1]))) in rkclk_set_dpll()
117 writel(((0x1 << 4) << 16) | (1 << 4), &dram->cru->mode_con); in rkclk_set_dpll()
120 static void rkclk_configure_ddr(struct dram_info *dram, in rkclk_configure_ddr() argument
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H A Dsdram_rv1126.c303 static void rkclk_ddr_reset(struct dram_info *dram, in rkclk_ddr_reset() argument
312 &dram->cru->softrst_con[12]); in rkclk_ddr_reset()
315 static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz) in rkclk_set_dpll() argument
351 writel(DPLL_MODE(CLOCK_FROM_XIN_OSC), &dram->cru->mode); in rkclk_set_dpll()
353 writel(0x1f000000, &dram->cru->clksel_con[64]); in rkclk_set_dpll()
354 writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->pll[1].con0); in rkclk_set_dpll()
358 clrsetbits_le32(&dram->cru->pll[1].con2, in rkclk_set_dpll()
366 &dram->cru->pll[1].con3); in rkclk_set_dpll()
369 &dram->cru->pll[1].con1); in rkclk_set_dpll()
373 if (LOCK(readl(&dram->cru->pll[1].con1))) in rkclk_set_dpll()
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H A Dsdram_rk322x.c363 static void phy_softreset(struct dram_info *dram) in phy_softreset() argument
365 struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy; in phy_softreset()
366 struct rk322x_grf *grf = dram->grf; in phy_softreset()
378 static void set_bw(struct dram_info *dram, u32 bw) in set_bw() argument
380 struct rk322x_ddr_pctl *pctl = dram->chan[0].pctl; in set_bw()
381 struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy; in set_bw()
382 struct rk322x_grf *grf = dram->grf; in set_bw()
577 static void dram_all_config(const struct dram_info *dram, in dram_all_config() argument
595 writel(sys_reg, &dram->grf->os_reg[2]); in dram_all_config()
600 static int dram_cap_detect(struct dram_info *dram, in dram_cap_detect() argument
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H A DKconfig4 This enable dram devfreq driver.
20 bool "enable rockchip dram extended temperature support"
24 This enable dram dram extended temperature support
27 int "TPL select DRAM type"
31 This choose DRAM type for TPL INIT code, 0 for DDR4, 2 for DDR2,
/OK3568_Linux_fs/kernel/drivers/net/wireless/intel/iwlwifi/pcie/
H A Dctxt-info.c98 struct iwl_dram_data *dram) in iwl_pcie_ctxt_info_alloc_dma() argument
100 dram->block = iwl_pcie_ctxt_info_dma_alloc_coherent(trans, len, in iwl_pcie_ctxt_info_alloc_dma()
101 &dram->physical); in iwl_pcie_ctxt_info_alloc_dma()
102 if (!dram->block) in iwl_pcie_ctxt_info_alloc_dma()
105 dram->size = len; in iwl_pcie_ctxt_info_alloc_dma()
106 memcpy(dram->block, data, len); in iwl_pcie_ctxt_info_alloc_dma()
113 struct iwl_self_init_dram *dram = &trans->init_dram; in iwl_pcie_ctxt_info_free_paging() local
116 if (!dram->paging) { in iwl_pcie_ctxt_info_free_paging()
117 WARN_ON(dram->paging_cnt); in iwl_pcie_ctxt_info_free_paging()
122 for (i = 0; i < dram->paging_cnt; i++) in iwl_pcie_ctxt_info_free_paging()
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/devfreq/
H A Drk3399_dmc.txt41 clocks freq is half of DRAM clock), default
58 The controller, pi, PHY and DRAM clock will
72 - rockchip,ddr3_odt_dis_freq : When the DRAM type is DDR3, this parameter defines
75 the ODT on the DRAM side and controller side are
78 - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines
79 the DRAM side driver strength in ohms. Default
82 - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines
83 the DRAM side ODT strength in ohms. Default value
86 - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines
91 - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/sandybridge/
H A Dmemory.json161 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.DRAM",
164 …on": "Counts all demand & prefetch code reads that miss the LLC and the data returned from dram.",
173 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.DRAM",
176 …on": "Counts all demand & prefetch data reads that miss the LLC and the data returned from dram.",
185 "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.LLC_MISS.DRAM",
188 …Description": "Counts all prefetch code reads that miss the LLC and the data returned from dram.",
197 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.LLC_MISS.DRAM",
200 …Description": "Counts all prefetch data reads that miss the LLC and the data returned from dram.",
209 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.LLC_MISS.DRAM",
212 …"BriefDescription": "Counts all prefetch RFOs that miss the LLC and the data returned from dram.",
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/nehalemex/
H A Dmemory.json10 "BriefDescription": "Offcore data reads satisfied by any DRAM",
32 "BriefDescription": "Offcore data reads satisfied by the local DRAM",
43 "BriefDescription": "Offcore data reads satisfied by a remote DRAM",
54 "BriefDescription": "Offcore code reads satisfied by any DRAM",
76 "BriefDescription": "Offcore code reads satisfied by the local DRAM",
87 "BriefDescription": "Offcore code reads satisfied by a remote DRAM",
98 "BriefDescription": "Offcore requests satisfied by any DRAM",
120 "BriefDescription": "Offcore requests satisfied by the local DRAM",
131 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
142 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/westmereex/
H A Dmemory.json18 "BriefDescription": "Offcore data reads satisfied by any DRAM",
40 "BriefDescription": "Offcore data reads satisfied by the local DRAM",
51 "BriefDescription": "Offcore data reads satisfied by a remote DRAM",
62 "BriefDescription": "Offcore code reads satisfied by any DRAM",
84 "BriefDescription": "Offcore code reads satisfied by the local DRAM",
95 "BriefDescription": "Offcore code reads satisfied by a remote DRAM",
106 "BriefDescription": "Offcore requests satisfied by any DRAM",
128 "BriefDescription": "Offcore requests satisfied by the local DRAM",
139 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
150 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/nehalemep/
H A Dmemory.json10 "BriefDescription": "Offcore data reads satisfied by any DRAM",
32 "BriefDescription": "Offcore data reads satisfied by the local DRAM",
43 "BriefDescription": "Offcore data reads satisfied by a remote DRAM",
54 "BriefDescription": "Offcore code reads satisfied by any DRAM",
76 "BriefDescription": "Offcore code reads satisfied by the local DRAM",
87 "BriefDescription": "Offcore code reads satisfied by a remote DRAM",
98 "BriefDescription": "Offcore requests satisfied by any DRAM",
120 "BriefDescription": "Offcore requests satisfied by the local DRAM",
131 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
142 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
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/OK3568_Linux_fs/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/
H A Ddram.c2 * LPC32xx dram init
7 * This is called by SPL to gain access to the SDR DRAM.
28 void ddr_init(struct emc_dram_settings *dram) in ddr_init() argument
40 writel(dram->cmddelay, &clk->sdramclk_ctrl); in ddr_init()
41 writel(dram->config0, &emc->config0); in ddr_init()
42 writel(dram->rascas0, &emc->rascas0); in ddr_init()
43 writel(dram->rdconfig, &emc->read_config); in ddr_init()
45 writel((ck / dram->trp) & 0x0000000F, &emc->t_rp); in ddr_init()
46 writel((ck / dram->tras) & 0x0000000F, &emc->t_ras); in ddr_init()
47 writel((ck / dram->tsrex) & 0x0000007F, &emc->t_srex); in ddr_init()
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/westmereep-sp/
H A Dmemory.json10 "BriefDescription": "Offcore data reads satisfied by any DRAM",
32 "BriefDescription": "Offcore data reads satisfied by the local DRAM",
43 "BriefDescription": "Offcore data reads satisfied by a remote DRAM",
54 "BriefDescription": "Offcore code reads satisfied by any DRAM",
76 "BriefDescription": "Offcore code reads satisfied by the local DRAM",
87 "BriefDescription": "Offcore code reads satisfied by a remote DRAM",
98 "BriefDescription": "Offcore requests satisfied by any DRAM",
120 "BriefDescription": "Offcore requests satisfied by the local DRAM",
131 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
142 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/amdzen1/
H A Ddata-fabric.json36 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
44 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
52 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
60 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
68 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
76 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
84 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
92 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/amdzen2/
H A Ddata-fabric.json36 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
44 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
52 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
60 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
68 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
76 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
84 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
92 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
/OK3568_Linux_fs/u-boot/include/dt-bindings/mrc/
H A Dquark.h21 /* If set ODR signal is asserted to DRAM devices on writes */
24 /* DRAM width */
29 /* DRAM speed */
33 /* DRAM type */
37 /* DRAM rank mask */
40 /* DRAM channel mask */
43 /* DRAM channel width */
48 /* DRAM address mode */
53 /* DRAM refresh rate */
58 /* DRAM SR temprature range */
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/skylakex/
H A Duncore-memory.json30 "BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode",
77 "BriefDescription": "DRAM Page Activate commands sent due to a write request",
82 …DRAM Page Activate commands sent on this channel due to a write request to the iMC (Memory Control…
87 "BriefDescription": "All DRAM CAS Commands issued",
92 …DRAM per memory channel. CAS commands are issued to specify the address to read or write on DRAM,…
97 "BriefDescription": "All DRAM Read CAS Commands issued (does not include underfills)",
102 …DRAM on a per channel basis. CAS commands are issued to specify the address to read or write on D…
107 "BriefDescription": "DRAM Underfill Read CAS Commands issued",
112 …DRAM due to a partial write, on a per channel basis. CAS commands are issued to specify the addre…
117 …"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; DRAM WR_CAS (w/ and w/out auto-pr…
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/cascadelakex/
H A Duncore-memory.json30 "BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode+C37",
143 "BriefDescription": "DRAM Page Activate commands sent due to a write request",
148 …DRAM Page Activate commands sent on this channel due to a write request to the iMC (Memory Control…
153 "BriefDescription": "All DRAM CAS Commands issued",
158 …DRAM per memory channel. CAS commands are issued to specify the address to read or write on DRAM,…
163 "BriefDescription": "All DRAM Read CAS Commands issued (does not include underfills)",
168 …DRAM on a per channel basis. CAS commands are issued to specify the address to read or write on D…
173 "BriefDescription": "DRAM Underfill Read CAS Commands issued",
178 …DRAM due to a partial write, on a per channel basis. CAS commands are issued to specify the addre…
183 …"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; DRAM WR_CAS (w/ and w/out auto-pr…
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/OK3568_Linux_fs/kernel/drivers/tty/serial/
H A Dicom.c346 void __iomem *dram_ptr = icom_port->dram; in load_code()
360 /* Zero out DRAM */ in load_code()
377 iram_ptr = (char __iomem *)icom_port->dram + ICOM_IRAM_OFFSET; in load_code()
397 iram_ptr = (char __iomem *) icom_port->dram + ICOM_IRAM_OFFSET; in load_code()
405 writeb(V2_HARDWARE, &(icom_port->dram->misc_flags)); in load_code()
411 &(icom_port->dram->HDLCConfigReg)); in load_code()
412 writeb(0x04, &(icom_port->dram->FlagFillIdleTimer)); /* 0.5 seconds */ in load_code()
413 writeb(0x00, &(icom_port->dram->CmdReg)); in load_code()
414 writeb(0x10, &(icom_port->dram->async_config3)); in load_code()
416 ICOM_ACFG_1STOP_BIT), &(icom_port->dram->async_config2)); in load_code()
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/OK3568_Linux_fs/kernel/drivers/pinctrl/
H A Dpinctrl-gemini.c132 "DRAM",
152 PINCTRL_PIN(2, "A3 DRAM CK"),
153 PINCTRL_PIN(3, "A4 DRAM CK N"),
154 PINCTRL_PIN(4, "A5 DRAM A5"),
155 PINCTRL_PIN(5, "A6 DRAM CKE"),
156 PINCTRL_PIN(6, "A7 DRAM DQ11"),
157 PINCTRL_PIN(7, "A8 DRAM DQ0"),
158 PINCTRL_PIN(8, "A9 DRAM DQ5"),
159 PINCTRL_PIN(9, "A10 DRAM DQ6"),
160 PINCTRL_PIN(10, "A11 DRAM DRAM VREF"),
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/OK3568_Linux_fs/kernel/drivers/edac/
H A Di3000_edac.c25 /* Intel 3000 register addresses - device 0 function 0 - DRAM Controller */
31 #define I3000_EDEAP 0x70 /* Extended DRAM Error Address Pointer (8b)
36 #define I3000_DEAP 0x58 /* DRAM Error Address Pointer (32b)
68 #define I3000_DERRSYN 0x5c /* DRAM Error Syndrome (8b)
70 * 7:0 DRAM ECC Syndrome
79 * 9 LOCK to non-DRAM Memory Flag (LCKF)
82 * 1 Multi-bit DRAM ECC Error Flag (DMERR)
83 * 0 Single-bit DRAM ECC Error Flag (DSERR)
95 * 9 SERR on LOCK to non-DRAM Memory
97 * 8 SERR on DRAM Refresh Timeout
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H A Di82975x_edac.c34 /* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */
35 #define I82975X_EAP 0x58 /* Dram Error Address Pointer (32b)
42 #define I82975X_DERRSYN 0x5c /* Dram Error SYNdrome (8b)
44 * 7:0 DRAM ECC Syndrome
47 #define I82975X_DES 0x5d /* Dram ERRor DeSTination (8b)
58 * 9 non-DRAM lock error (ndlock)
61 * 1 ECC UE (multibit DRAM error)
62 * 0 ECC CE (singlebit DRAM error)
76 * 9 non-DRAM lock error (ndlock)
79 * 1 ECC UE (multibit DRAM error)
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/OK3568_Linux_fs/u-boot/include/
H A Dddr_spd.h128 unsigned char psi_ta_dram; /* 48 Thermal Resistance of DRAM Package from
129 Top (Case) to Ambient (Psi T-A DRAM) */
130 unsigned char dt0_mode; /* 49 DRAM Case Temperature Rise from Ambient
133 unsigned char dt2n_dt2q; /* 50 DRAM Case Temperature Rise from Ambient
136 unsigned char dt2p; /* 51 DRAM Case Temperature Rise from Ambient
138 unsigned char dt3n; /* 52 DRAM Case Temperature Rise from Ambient
140 unsigned char dt3pfast; /* 53 DRAM Case Temperature Rise from Ambient
143 unsigned char dt3pslow; /* 54 DRAM Case Temperature Rise from Ambient
146 unsigned char dt4r_dt4r4w; /* 55 DRAM Case Temperature Rise from Ambient
149 unsigned char dt5b; /* 56 DRAM Case Temperature Rise from Ambient
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