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/OK3568_Linux_fs/kernel/drivers/memory/samsung/
H A Dexynos5422-dmc.c104 * Covers frequency and voltage settings of the DMC operating mode.
112 * struct exynos5_dmc - main structure describing DMC device
113 * @dev: DMC device
238 static int exynos5_counters_set_event(struct exynos5_dmc *dmc) in exynos5_counters_set_event() argument
242 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_set_event()
243 if (!dmc->counter[i]) in exynos5_counters_set_event()
245 ret = devfreq_event_set_event(dmc->counter[i]); in exynos5_counters_set_event()
252 static int exynos5_counters_enable_edev(struct exynos5_dmc *dmc) in exynos5_counters_enable_edev() argument
256 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_enable_edev()
257 if (!dmc->counter[i]) in exynos5_counters_enable_edev()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/
H A Ddmc_init_exynos4.c27 #include <asm/arch/dmc.h>
51 static void phy_control_reset(int ctrl_no, struct exynos4_dmc *dmc) in phy_control_reset() argument
55 &dmc->phycontrol1); in phy_control_reset()
57 &dmc->phycontrol1); in phy_control_reset()
60 &dmc->phycontrol0); in phy_control_reset()
62 &dmc->phycontrol0); in phy_control_reset()
66 static void dmc_config_mrs(struct exynos4_dmc *dmc, int chip) in dmc_config_mrs() argument
76 &dmc->directcmd); in dmc_config_mrs()
80 static void dmc_init(struct exynos4_dmc *dmc) in dmc_init() argument
87 writel(mem.control1, &dmc->phycontrol1); in dmc_init()
[all …]
H A Ddmc_init_ddr3.c14 #include <asm/arch/dmc.h>
40 struct exynos5_dmc *dmc; in ddr3_mem_ctrl_init() local
46 dmc = (struct exynos5_dmc *)samsung_get_base_dmc_ctrl(); in ddr3_mem_ctrl_init()
76 &dmc->concontrol); in ddr3_mem_ctrl_init()
78 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init()
103 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init()
106 &dmc->concontrol); in ddr3_mem_ctrl_init()
109 writel(mem->iv_size, &dmc->ivcontrol); in ddr3_mem_ctrl_init()
111 writel(mem->memconfig, &dmc->memconfig0); in ddr3_mem_ctrl_init()
112 writel(mem->memconfig, &dmc->memconfig1); in ddr3_mem_ctrl_init()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/devfreq/
H A Drockchip_dmc.txt1 * Rockchip DMC(Dynamic Memory Controller) device
5 - "rockchip,px30-dmc" - for PX30 SoCs.
6 - "rockchip,rk1808-dmc" - for RK1808 SoCs.
7 - "rockchip,rk3128-dmc" - for RK3128 SoCs.
8 - "rockchip,rk3228-dmc" - for RK3228 SoCs.
9 - "rockchip,rk3288-dmc" - for RK3288 SoCs.
10 - "rockchip,rk3308-dmc" - for RK3308 SoCs.
11 - "rockchip,rk3328-dmc" - for RK3328 SoCs.
12 - "rockchip,rk3399-dmc" - for RK3399 SoCs.
13 - "rockchip,rk3528-dmc" - for RK3528 SoCs.
[all …]
H A Drk3399_dmc.txt1 * Rockchip rk3399 DMC (Dynamic Memory Controller) device
4 - compatible: Must be "rockchip,rk3399-dmc".
13 - center-supply: DMC supply node.
176 dmc: dmc {
177 compatible = "rockchip,rk3399-dmc";
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/
H A Dintel_csr.c33 * DOC: csr support for dmc
36 * onwards to drive newly added DMC (Display microcontroller) in display
89 /* 0x09 for DMC */
92 /* Includes the DMC specific header in dwords */
107 /* Size in dwords (CSS_Headerlen + PackageHeaderLen + dmc FWsLen)/4 */
149 /* DMC container header length in dwords */
165 /* DMC binary header length */
205 /* DMC RAM start MMIO address */
430 DRM_ERROR("Unknown DMC fw header version: %u\n", in parse_csr_fw_dmc()
436 DRM_ERROR("DMC firmware has wrong dmc header length " in parse_csr_fw_dmc()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/edac/
H A Ddmc-520.yaml4 $id: http://devicetree.org/schemas/edac/dmc-520.yaml#
7 title: ARM DMC-520 EDAC bindings
13 DMC-520 node is defined to describe DRAM error detection and correction.
20 - const: brcm,dmc-520
21 - const: arm,dmc-520
56 dmc0: dmc@200000 {
57 compatible = "brcm,dmc-520", "arm,dmc-520";
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/
H A Dexynos5422-dmc.txt3 The Samsung Exynos5422 SoC has DMC (Dynamic Memory Controller) to which the DRAM
9 switch the DMC and memory frequency.
11 Required properties for DMC device for Exynos5422:
12 - compatible: Should be "samsung,exynos5422-dmc".
20 - devfreq-events : phandles for PPMU devices connected to this DMC.
34 Optional properties for DMC device for Exynos5422:
36 - interrupts : Contains the IRQ line numbers for the DMC internal performance
56 dmc: memory-controller@10c20000 {
57 compatible = "samsung,exynos5422-dmc";
/OK3568_Linux_fs/u-boot/drivers/power/dvfs/
H A Drockchip_wtemp_dvfs.c21 * 1. U-Boot parse cpu/dmc opp table from kernel dtb, anyone of
23 * cpu/dmc nodes means wtemp is enabled.
32 * 2. U-Boot parse cpu/dmc thermal zone "trip-point-0" temperature from kernel
49 * dmc,low-temp-repeat;
50 * dmc,high-temp-repeat;
55 #define FDT_PATH_DMC "/dmc"
116 struct pm_element *dmc; member
128 .name = "dmc",
498 ofnode cpus, cpu, dmc; in wtemp_dvfs_ofdata_to_platdata() local
532 /* 2. Parse dmc node */ in wtemp_dvfs_ofdata_to_platdata()
[all …]
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/clock/
H A Drockchip,rk3368-dmc.txt4 The RK3368 DMC (dynamic memory controller) driver supports setup/initialisation
15 - compatible: "rockchip,rk3368-dmc"
54 #include <dt-bindings/memory/rk3368-dmc.h>
56 dmc: dmc@ff610000 {
58 compatible = "rockchip,rk3368-dmc";
63 &dmc {
H A Drockchip,rk3399-dmc.txt3 - compatible: "rockchip,rk3399-dmc", "syscon"
18 dmc: dmc {
20 compatible = "rockchip,rk3399-dmc";
35 &dmc {
H A Drockchip,rk3288-dmc.txt3 - compatible: "rockchip,rk3288-dmc", "syscon"
18 -logic-supply: this driver should adjust VDD_LOGIC according to dmc frequency, so need get logic-su…
113 dmc: dmc@ff610000 {
114 compatible = "rockchip,rk3288-dmc", "syscon";
132 &dmc {
/OK3568_Linux_fs/kernel/Documentation/admin-guide/perf/
H A Dthunderx2-pmu.rst6 PMUs such as the Level 3 Cache (L3C), DDR4 Memory Controller (DMC) and
9 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles.
13 The DMC and L3C support up to 4 counters, while the CCPI2 supports up to 8
16 overflow interrupt. DMC and L3C counters are 32-bit and read every 2 seconds.
21 The thunderx2_pmu driver registers per-socket perf PMUs for the DMC and
22 L3C devices. Each PMU can be used to count up to 4 (DMC/L3C) or up to 8
/OK3568_Linux_fs/external/security/librkcrypto/perf_reports/
H A DReadMe_CN.md13 - ddr用户空间设置 ：`echo userspace > /sys/class/devfreq/dmc/governor`
14 - 查看是否关成功 ：`cat /sys/class/devfreq/dmc/governor`
15 - ddr频率列表 ：`cat /sys/class/devfreq/dmc/available_frequencies`
16 - ddr当前频率设置 ：`echo 528000000 > /sys/class/devfreq/dmc/userspace/set_freq`
17 - ddr查看当前频率 ：`cat /sys/class/devfreq/dmc/cur_freq`
H A DReadMe_EN.md13 - Set to userspace mode : `echo userspace > /sys/class/devfreq/dmc/governor`
14 - Check mode set succeed : `cat /sys/class/devfreq/dmc/governor`
15 - List all available frequencies : `cat /sys/class/devfreq/dmc/available_frequencies`
16 - Set highest frequency : `echo 528000000 > /sys/class/devfreq/dmc/userspace/set_freq`
17 - Check frequency : `cat /sys/class/devfreq/dmc/cur_freq`
H A DRV1106_perf.txt5 # cat /sys/class/devfreq/dmc/governor
6 cat: can't open '/sys/class/devfreq/dmc/governor': No such file or directory
7 # cat /sys/class/devfreq/dmc/cur_freq
8 cat: can't open '/sys/class/devfreq/dmc/cur_freq': No such file or directory
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Drockchip_sdram.c92 { .compatible = "rockchip,rv1108-dmc" },
94 { .compatible = "rockchip,rk3036-dmc" },
96 { .compatible = "rockchip,rk3308-dmc" },
98 { .compatible = "rockchip,px30-dmc" },
100 { .compatible = "rockchip,rk1808-dmc" },
H A DKconfig2 bool "ROCKCHIP DMC"
7 bool "Rockchip initialize DMC FSP"
/OK3568_Linux_fs/external/rockchip-test/ddr/
H A Dddr_freq_scaling.sh3 DMC_PATH=/sys/class/devfreq/dmc
6 echo "non-existent dmc path, please check if dmc enabled"
/OK3568_Linux_fs/debian/overlay-debug/rockchip-test/ddr/
H A Dddr_freq_scaling.sh3 DMC_PATH=/sys/class/devfreq/dmc
6 echo "non-existent dmc path, please check if dmc enabled"
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3368-px5-evb-u-boot.dtsi16 &dmc {
21 * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
40 &dmc {
/OK3568_Linux_fs/kernel/drivers/net/ethernet/sun/
H A Dniu.h19 #define DMC 0x600000UL macro
1978 #define RXDMA_CFIG1(IDX) (DMC + 0x00000UL + (IDX) * 0x200UL)
1984 #define RXDMA_CFIG2(IDX) (DMC + 0x00008UL + (IDX) * 0x200UL)
1990 #define RBR_CFIG_A(IDX) (DMC + 0x00010UL + (IDX) * 0x200UL)
1996 #define RBR_CFIG_B(IDX) (DMC + 0x00018UL + (IDX) * 0x200UL)
2026 #define RBR_KICK(IDX) (DMC + 0x00020UL + (IDX) * 0x200UL)
2029 #define RBR_STAT(IDX) (DMC + 0x00028UL + (IDX) * 0x200UL)
2032 #define RBR_HDH(IDX) (DMC + 0x00030UL + (IDX) * 0x200UL)
2035 #define RBR_HDL(IDX) (DMC + 0x00038UL + (IDX) * 0x200UL)
2038 #define RCRCFIG_A(IDX) (DMC + 0x00040UL + (IDX) * 0x200UL)
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drk3288-linux.dtsi14 /delete-node/ dmc@ff610000;
23 dmc: dmc { label
24 compatible = "rockchip,rk3288-dmc";
/OK3568_Linux_fs/kernel/drivers/cpufreq/
H A Ds5pv210-cpufreq.c194 * ch: DMC port number 0 or 1
207 pr_err("Cannot find DMC port\n"); in s5pv210_set_refresh()
536 /* Find current refresh counter and frequency each DMC */ in s5pv210_cpu_init()
599 * and DMC controller registers directly and remove static mappings in s5pv210_cpufreq_probe()
632 for_each_compatible_node(np, NULL, "samsung,s5pv210-dmc") { in s5pv210_cpufreq_probe()
633 id = of_alias_get_id(np, "dmc"); in s5pv210_cpufreq_probe()
635 dev_err(dev, "failed to get alias of dmc node '%pOFn'\n", np); in s5pv210_cpufreq_probe()
643 dev_err(dev, "failed to map dmc%d registers\n", id); in s5pv210_cpufreq_probe()
652 dev_err(dev, "failed to find dmc%d node\n", id); in s5pv210_cpufreq_probe()
/OK3568_Linux_fs/u-boot/drivers/ram/
H A Ddmc-uclass.c8 UCLASS_DRIVER(dmc) = {
10 .name = "dmc",

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