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/OK3568_Linux_fs/u-boot/board/freescale/mpc8572ds/
H A DREADME98 1. Build kernel image for core0:
107 d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0
128 3. Create dtb for core0:
157 c. Bring up core0's kernel(on the same U-Boot console):
160 => tftp 1000000 8572/uImage.core0
165 Please note only core0 will run U-Boot, core1 starts kernel directly after
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/
H A Dp1020rdb-pc_camp_core0.dts3 * P1020 RDB-PC Core0 Device Tree Source in CAMP mode.
7 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
10 * Please note to add "-b 0" for core0's dts compiling.
H A Dmpc8572ds_camp_core0.dts3 * MPC8572 DS Core0 Device Tree Source in CAMP mode.
7 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Daxm5516-cpus.dtsi15 core0 {
29 core0 {
43 core0 {
57 core0 {
H A Dhip04.dtsi31 core0 {
45 core0 {
59 core0 {
73 core0 {
H A Dmt8135.dtsi22 core0 {
31 core0 {
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/
H A Dqcom,sdm845-venus-v2.yaml59 video-core0:
107 - video-core0
139 video-core0 {
H A Dqcom,sdm845-venus.yaml45 video-core0:
120 - video-core0
143 video-core0 {
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/cpu/
H A Dcpu-topology.txt194 core0 {
214 core0 {
236 core0 {
255 core0 {
413 core0 {
428 core0 {
507 core0 {
/OK3568_Linux_fs/kernel/drivers/remoteproc/
H A Dti_k3_r5_remoteproc.c420 * mode requires the boot vector to be configured only for Core0, and then
422 * first followed by Core0. The Split-mode requires that Core0 to be maintained
424 * always only after Core0 is started).
505 * performed first on Core0 followed by Core1. The Split-mode requires that
506 * Core0 to be maintained always in a higher power state that Core1 (implying
507 * Core1 needs to be stopped first before Core0).
651 * dictating ARM or Thumb mode) can only be set and retrieved using Core0.
655 * They are identically configured in LockStep mode using the primary Core0
665 struct k3_r5_core *core0, *core, *temp; in k3_r5_rproc_configure() local
672 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_rproc_configure()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpu/
H A Dbrcm,bcm-v3d.txt9 - reg-names: Names for the register areas. The "hub" and "core0"
30 reg-names = "bridge", "hub", "core0", "gca";
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/hisilicon/
H A Dhip05.dtsi27 core0 {
41 core0 {
55 core0 {
69 core0 {
H A Dhip07.dtsi27 core0 {
42 core0 {
57 core0 {
72 core0 {
87 core0 {
102 core0 {
117 core0 {
132 core0 {
147 core0 {
162 core0 {
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Dp1_p2_rdb_pc.h50 * 111101 533 533 267 667 NOR Core0 boot; Core1 hold-off
51 * 101101 667 667 333 667 NOR Core0 boot; Core1 hold-off
52 * 011001 800 800 400 667 NOR Core0 boot; Core1 hold-off
53 * 001001 800 800 400 667 SD/MMC Core0 boot; Core1 hold-off
54 * 001101 800 800 400 667 SPI Core0 boot; Core1 hold-off
55 * 010001 800 800 400 667 NAND Core0 boot; Core1 hold-off
56 * 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-j721e-som-p0.dtsi121 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
135 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
149 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
H A Dk3-am654.dtsi16 core0 {
26 core0 {
H A Dk3-j7200.dtsi42 core0 {
157 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
/OK3568_Linux_fs/external/linux-rga/samples/im2d_slt/
H A DREADME.md75 | IM2D_SLT_TEST_RGA3_0_EN | 使能该配置后，将使能RGA3 core0 拷贝测试case。 |
77 | IM2D_SLT_TEST_RGA3_0_FBC_EN | 使能该配置后，将使能RGA3 core0 FBC模式 拷贝测试case。 |
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12b.dtsi18 core0 {
28 core0 {
H A Dmeson-gxm.dtsi15 core0 {
30 core0 {
/OK3568_Linux_fs/kernel/sound/soc/intel/skylake/
H A Dbxt-sst.c113 dev_err(ctx->dev, "dsp core0/1 power up failed\n"); in sst_bxt_prepare_fw()
121 /* Step 3: Unset core0 reset state & unstall/run core0 */ in sst_bxt_prepare_fw()
299 "D0i3 allowed when only core0 running:Exit\n"); in bxt_set_dsp_D0i3()
451 dev_err(ctx->dev, "Failed to set core0 to D0 state\n"); in bxt_set_dsp_D0()
H A Dskl-sst-dsp.c281 dev_err(ctx->dev, "dsp core0 reset fail: %d\n", ret); in skl_dsp_boot()
287 dev_err(ctx->dev, "dsp core0 start fail: %d\n", ret); in skl_dsp_boot()
293 dev_err(ctx->dev, "dsp core0 disable fail: %d\n", ret); in skl_dsp_boot()
H A Dskl-sst-dsp.h76 /* Core ID of core0 */
84 * since Core0 is primary core and it is used often
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dhi6220.dtsi27 core0 {
41 core0 {
/OK3568_Linux_fs/kernel/drivers/hwmon/
H A Dk8temp.c172 scfg &= ~(SEL_PLACE | SEL_CORE); /* Select sensor 0, core0 */ in k8temp_probe()
188 scfg &= ~SEL_CORE; /* Select sensor 1, core0 */ in k8temp_probe()

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